Semiconductor device
A semiconductor device is comprised of a semiconductor substrate, conductive layers stacked above the semiconductor substrate, which is comprised of a conductive polysilicon, and a metal layer provided above the conductive layers. Both ends of the conductive layers have stairsteps respectively. The conductive layers are connected in series by a metal layer which is provided on the stairsteps. The conductive layers connected in series comprise a resistance element.
1. A semiconductor device comprising:
a semiconductor substrate;
conductive layers stacked above the semiconductor substrate, which is comprised of a conductive polysilicon;
a metal layer provided above the conductive layers; and
a 3-dimensional memory which includes conductive layers stacked above the semiconductor substrate, which is comprised of a conductive polysilicon,
wherein both ends of the conductive layers have stairsteps respectively, the conductive layers are connected in series by a metal layer which is provided on the stairsteps, and the conductive layers connected in series comprises a resistance element,
wherein the number of the conductive layers which comprises the resistance element is equal to the number of the conductive layers which comprises the 3-dimensional memory.
2. The device according to claim 1 ,
wherein each of the conductive layers is comprised of conductive lines which are extend to the same direction, and the conductive lines are connected in series by the metal layer.
3. The device according to claim 2 ,
wherein the conductive lines in the odd-numbered conductive layer form the semiconductor substrate and the conductive lines in the even-numbered conductive layer form the semiconductor substrate are shifted in a half pitch of the conductive lines in a direction perpendicular to a direction in which the conductive layers extend.
4. The device according to claim 2 ,
wherein a direction in which the conductive lines in the odd-numbered conductive layer form the semiconductor substrate extend and a direction in which the conductive lines in the even-numbered conductive layer form the semiconductor substrate extend are crossed each other.
5. The device according to claim 1 ,
wherein the 3-dimensional memory is a nonvolatile semiconductor memory which is applied a BiCS technique.
6. The device according to claim 1 ,
wherein the resistance element is provided in a peripheral circuit of the 3-dimensional memory.
7. A semiconductor device comprising:
a semiconductor substrate;
three or more conductive layers stacked above the semiconductor substrate, which is comprised of a conductive polysilicon; and
a metal layer provided above the conductive layers,
wherein both ends of the conductive layers have stairsteps respectively,
wherein the odd-numbered conductive layers are connected in series by a metal layer which is provided on the stairsteps, and the odd-numbered conductive layers connected in series comprise a first electrode of a capacitance element,
wherein the even-numbered conductive layers are connected in series by a metal layer which is provided on the stairsteps, and the even-numbered conductive layers connected in series comprise a second electrode of the capacitance element.
8. The device according to claim 7 , further comprising
a 3-dimensional memory which includes conductive layers stacked above the semiconductor substrate, which is comprised of a conductive polysilicon,
wherein the number of the conductive layers which comprises the capacitance element is equal to the number of the conductive layers which comprises the 3-dimensional memory.
9. The device according to claim 8 ,
wherein the 3-dimensional memory is a nonvolatile semiconductor memory which is applied a BiCS technique.
10. The device according to claim 8 ,
wherein the capacitance element is provided in a peripheral circuit of the 3-dimensional memory.
11. A semiconductor device comprising:
a semiconductor substrate;
conductive layers stacked above the semiconductor substrate, which is comprised of a conductive polysilicon; and
a metal layer provided above the conductive layers,
wherein both ends of the conductive layers have stairsteps respectively, the conductive layers are connected in series by a metal layer which is provided on the stairsteps, and the conductive layers connected in series comprises a resistance element,
wherein each of the conductive layers is comprised of conductive lines which are extend to the same direction, and the conductive lines are connected in series by the metal layer,
wherein the conductive lines in the odd-numbered conductive layer form the semiconductor substrate and the conductive lines in the even-numbered conductive layer form the semiconductor substrate are shifted in a half pitch of the conductive lines in a direction perpendicular to a direction in which the conductive layers extend.
12. The device according to claim 11 ,
wherein a direction in which the conductive lines in the odd-numbered conductive layer form the semiconductor substrate extend and a direction in which the conductive lines in the even-numbered conductive layer form the semiconductor substrate extend are crossed each other.