IP Library Granted Patent US 8,085,346
Granted Patent B2
US 8,085,346 · App. 12/623,534 · Granted Dec 27, 2011

Filter module for a video decoding system

Assignee: Broadcom Corporation
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Quick Facts
Patent No.
US 8,085,346
App. No.
12/623,534
Granted
Dec 27, 2011
Kind
B2
Abstract

Systems and methods are disclosed for filter modules in a video display system or network. One embodiment relates to a method for operating a filter module in a video display network comprising determining a picture type, display type and operation of the display network. The method further comprises determining, in real time, a filter configuration from a plurality of possible filter configurations based on the determined picture type, display type and operation.

Claims (24)

1. A video display system, said system comprising:

a plurality of filters for filtering a corresponding plurality of video streams; and

a register direct memory access controller for simultaneously configuring the plurality of filters, wherein each of the corresponding plurality of filters are configured for a particular one of the plurality of video streams, wherein each of the plurality of filters are configured based at least in part on a determination of the picture type of the particular one of the plurality of video streams and the display type of the at least one display device; and

at least one output for simultaneously outputting each of the plurality of video streams filtered by the plurality of filters.

2. The system of claim 1 , wherein the determination of the picture type of the plurality of video streams further comprises determining if the picture type is frame based video, field based video, or graphics.

3. The system of claim 1 , wherein the determination of a display type of the at least one display device comprises determining if said at least one display type is progressive or interlaced.

4. The system of claim 1 , further comprising:

an interpolator operable to interpolate selected ones of the plurality of video streams;

a decimator operable to decimate other selected ones of the plurality of video streams; and

wherein the register direct memory access controller configures each of the plurality of filters based at least in part on whether the interpolation or decimation operations is to be performed on the particular one of the plurality of video streams.

5. The system of claim 1 , wherein the register direct memory access controller configures the plurality of filters in accordance with at least one register write instruction.

6. The system of claim 1 , wherein the at least one display further comprises a plurality of simultaneous displays, wherein each of the plurality of simultaneous displays are associated with a particular one of the video streams, and wherein the register direct memory access controller configures the filter based at least in part on the display type of the one of the plurality of simultaneous displays that is associated with the particular video stream.

7. An apparatus for providing displayable video, said apparatus comprising:

a plurality of filters operable to filter a corresponding plurality of video streams; and

a register direct memory access controller operably connected to the plurality of filters to simultaneously configure the plurality of filters, wherein each of the corresponding plurality of filters are configured for a particular one of the plurality of video streams, wherein each of the plurality of filters are configured based at least in part on a determination of the picture type of the particular one of the plurality of video streams and the display type of the at least one display device; and

at least one output operable to simultaneously output each of the plurality of video streams filtered by the plurality of filters.

8. The apparatus of claim 7 , wherein the determination of the picture type of the plurality of video streams further comprises determining if the picture type is frame based video, field based video, or graphics.

9. The apparatus of claim 7 , wherein the determination of a display type of the at least one display device comprises determining if said at least one display type is progressive or interlaced.

10. The apparatus of claim 7 , further comprising:

an interpolator operable to interpolate selected ones of the plurality of video streams;

a decimator operable to decimate other selected ones of the plurality of video streams; and

wherein the register direct memory access controller is operably connected to the interpolator and the decimator and configures each of the plurality of filters based at least in part on whether the interpolation or decimation operations is to be performed on the particular one of the plurality of video streams.

11. The apparatus of claim 7 , wherein the register direct memory access controller configures the plurality of filters in accordance with at least one register write instruction.

12. The apparatus of claim 7 , wherein the at least one display further comprises a plurality of simultaneous displays, wherein each of the plurality of simultaneous displays are associated with a particular one of the video streams, and wherein the register direct memory access controller configures the filter based at least in part on the display type of the one of the plurality of simultaneous displays that is associated with the particular video stream.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE PROPERTY NUMBERS PREVIOUSLY RECORDED AT REEL: 47630 FRAME: 344. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 21, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0267 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER TO 9/5/2018 PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0687. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0344 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0687 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
Continuity (3)
Continuation 10386312 · Mar 11, 2003
Provisional Application 60420226 · Oct 22, 2002
Related Publication 20100066902A1 · Mar 18, 2010