IP Library Granted Patent US 8,099,705
Granted Patent B2
US 8,099,705 · App. 12/432,002 · Granted Jan 17, 2012

Technique for determining circuit interdependencies

Assignee: Oracle America, Inc.
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Quick Facts
Patent No.
US 8,099,705
App. No.
12/432,002
Granted
Jan 17, 2012
Kind
B2
Abstract

Embodiments of a device (such as a computer system or a circuit tester), a method, and a computer-program product (i.e., software) for use with the device are described. These systems and processes may be used to statistically characterize interdependencies between sub-circuits in an integrated circuit (which are referred to as ‘aggressor-victim relationships’). In particular, statistical relationships between the aggressors and victims are determined from values of a performance metric (such as clock speed) when the integrated circuit fails for a group of state-change difference vectors. Using these statistical relationships, a worst-case sub-group of the state-change difference vectors, such as the worst-case sub-group, is selected. This sub-group can be used to accurately test the integrated circuit.

Claims (38)

1. A method for selecting a sub-group of state-change difference vectors from a group of state-change difference vectors for testing a circuit, comprising:

using a computer to generate the group state-change difference vectors, wherein a given state-change difference vector corresponds to a change in a state of circuit components in the circuit, and wherein one or more elements in the given state-change difference vector specify state transitions for one or more of the circuit components;

determining values of a performance metric for the group of state-change difference vectors when the circuit fails during testing, wherein a given value of the performance metric corresponds to the given state-change difference vector;

for a given sub-circuit in a set of sub-circuits in the circuit and the group of state-change difference vectors, calculating statistical relationships between a transition type in the given sub-circuit when the circuit failed during testing and transition types in other sub-circuits in the set of sub-circuits, wherein a statistical relationship is determined for each pairing of the given sub-circuit with one of the other sub-circuits;

repeating the calculating for all of the sub-circuits in the set of sub-circuits; and

selecting the sub-group of state-change difference vectors based on the calculated statistical relationships, wherein the selected state-change difference vectors are those that result in failure of the circuit during testing for a range of values of the performance metric.

2. The method of claim 1 , wherein the group of state-change difference vectors is generated using a pseudo-random generator.

3. The method of claim 1 , wherein a number of state-change difference vectors in the group of state-change difference vectors is based on a number of logic levels and fan-in between gates in the circuit.

4. The method of claim 1 , wherein the circuit components include logic circuits.

5. The method of claim 1 , wherein the circuit components include gates.

6. The method of claim 1 , wherein the performance metric includes clock speed.

7. The method of claim 1 , wherein the performance metric includes power consumption.

8. The method of claim 1 , wherein determining the values of the performance metric involves measurements on a current version of the circuit.

9. The method of claim 1 , wherein the transition types in the other sub-circuits include a transition from a first logical state to a second logical state, a transition from the second logical state to the first logical state, and no transition.

10. The method of claim 1 , wherein the transition types in the other sub-circuits can include the transition type in the given sub-circuit.

11. The method of claim 1 , further comprising selecting the set of sub-circuits in the circuit prior to calculating the statistical relationships.

12. The method of claim 1 , wherein the statistical relationship for each pairing corresponds to co-occurrences of the transition type in the given sub-circuit and one of the transition types in the one of the other sub-circuits for multiple state-change difference vectors in the group of state-change difference vectors.

13. The method of claim 12 , wherein a co-occurrence for a given state-change difference vector includes a presence of the transition type in the given sub-circuit and a presence of the one of the transition types in the one of the other sub-circuits, or an absence of the transition type in the given sub-circuit and an absence of the one of the transition types in the one of the other sub-circuits.

14. The method of claim 1 , wherein the statistical relationship for each pairing corresponds to cross-occurrences of the transition type in the given sub-circuit and one of the transition types in the one of the other sub-circuits for multiple state-change difference vectors in the group of state-change difference vectors.

15. The method of claim 14 , wherein a cross-occurrence for a given state-change difference vector includes a presence of the transition type in the given sub-circuit and an absence of the one of the transition types in the one of the other sub-circuits, or an absence of the transition type in the given sub-circuit and a presence of the one of the transition types in the one of the other sub-circuits.

16. The method of claim 1 , further comprising determining a margin for the performance metric using the selected sub-group of state-change difference vectors.

17. The method of claim 16 , further comprising revising the circuit based on the determined margin or changing manufacturing of the circuit based on the determined margin.

18. The method of claim 1 , wherein failure of the circuit for the given state-change difference vector is associated with cross-talk.

19. A computer-program product for use in conjunction with a computer system, the computer-program product comprising a non-transitory computer-readable storage medium and a computer-program mechanism embedded therein for selecting a sub-group of state-change difference vectors from a group of state-change difference vectors for testing a circuit, the computer-program mechanism including:

instructions for generating the group state-change difference vectors, wherein a given state-change difference vector corresponds to a change in a state of circuit components in the circuit, and wherein one or more elements in the given state-change difference vector specify state transitions for one or more of the circuit components;

instructions for determining values of a performance metric for the group of state-change difference vectors when the circuit fails during testing, wherein a given value of the performance metric corresponds to the given state-change difference vector;

for a given sub-circuit in a set of sub-circuits in the circuit and the group of state-change difference vectors, instructions for calculating statistical relationships between a transition type in the given sub-circuit when the circuit failed during testing and transition types in other sub-circuits in the set of sub-circuits, wherein a statistical relationship is determined for each pairing of the given sub-circuit with one of the other sub-circuits;

instructions for repeating the calculating for all of the sub-circuits in the set of sub-circuits; and

instructions for selecting the sub-group of state-change difference vectors based on the calculated statistical relationships, wherein the selected state-change difference vectors are those that result in failure of the circuit during testing for a range of values of the performance metric.

20. A computer system, comprising:

a processor;

memory;

a program module, wherein the program module is stored in the memory and configured to be executed by the processor, wherein the program module selects a sub-group of state-change difference vectors from a group of state-change difference vectors for testing a circuit, the program module including:

instructions for generating the group state-change difference vectors, wherein a given state-change difference vector corresponds to a change in a state of circuit components in the circuit, and wherein one or more elements in the given state-change difference vector specify state transitions for one or more of the circuit components;

instructions for determining values of a performance metric for the group of state-change difference vectors when the circuit fails during testing, wherein a given value of the performance metric corresponds to the given state-change difference vector;

for a given sub-circuit in a set of sub-circuits in the circuit and the group of state-change difference vectors, instructions for calculating statistical relationships between a transition type in the given sub-circuit when the circuit failed during testing and transition types in other sub-circuits in the set of sub-circuits, wherein a statistical relationship is determined for each pairing of the given sub-circuit with one of the other sub-circuits;

instructions for repeating the calculating for all of the sub-circuits in the set of sub-circuits; and

instructions for selecting the sub-group of state-change difference vectors based on the calculated statistical relationships, wherein the selected state-change difference vectors are those that result in failure of the circuit during testing for a range of values of the performance metric.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Dec 16, 2015
From: ORACLE USA, INC.; SUN MICROSYSTEMS, INC.; ORACLE AMERICA, INC.
To: ORACLE AMERICA, INC.
Reel/Frame 037311/0134 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 20, 2009
From: DICKINSON, PAUL J.; GOPINATH, VENKATESH P.; DAHLGREN, KARL P.; CHEN, LIANG-CHI
To: SUN MICROSYSTEMS, INC.
Reel/Frame 022712/0841 →
Continuity (1)
Related Publication 20100281442A1 · Nov 4, 2010