IP Library Granted Patent US 8,112,594
Granted Patent B2
US 8,112,594 · App. 12/106,712 · Granted Feb 7, 2012

Efficient point-to-point enqueue and dequeue communications

Assignee: The Regents of the University of Colorado
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,112,594
App. No.
12/106,712
Granted
Feb 7, 2012
Kind
B2
Abstract

Systems and methods for writing and/or reading data to a point-to-point shared memory communication mechanism are provided according to embodiments disclosed herein. According to one embodiment, a determination may be made whether a first memory location in the cache of a general purpose multi-core processor includes an empty symbol. If the first memory location includes the empty symbol, then data may be placed in the first memory location in the cache. If the first memory location does not include the empty symbol, then waiting until it does. In another embodiment, a determination may be made whether a first memory location of a general purpose multi-core processor includes the empty symbol. If it does not, then data may be read from the first memory location and/or the empty symbol may be written into the first memory location. If the first memory location does include the empty symbol, then pausing.

Claims (63)

1. A method comprising:

pointing a head pointer to an oldest empty memory location in a set of the most recent memory entries of a general purpose multi-core processor where data was enqueued;

pointing a tail pointer to the oldest memory location in the set of most recent entries where data was enqueued;

determining whether a first memory location pointed to by the head pointer includes an empty symbol; and

if the first memory location includes the empty symbol, placing data in the first memory location and incrementing the head pointer.

2. The method according to claim 1 , further comprising:

identifying a distance between the head pointer and the tail pointer;

determining that the distance between the head pointer and the tail pointer is less than a threshold distance; and

pausing dequeue based on the determination.

3. The method according to claim 2 , wherein the dequeue is paused for a number of frames, a time period, a number of iterations, or a number of cache lines.

4. The method according to claim 3 , wherein a length of the dequeue pause is based on the identified distance between the head pointer and the tail pointer.

5. The method according to claim 1 , wherein the empty symbol comprises: the NULL pointer.

6. The method according to claim 1 , further comprising:

determining whether a second memory location includes the empty symbol; and

placing data in the second memory location if the second memory location includes the empty symbol.

7. The method according to claim 1 , wherein if the first memory location includes the empty symbol, the incrementing comprises incrementing the head pointer to point to a second memory location after placing data in the first memory location.

8. A method comprising:

pointing a head pointer to an oldest memory location in a set of the most recent memory entries of a general purpose multi-core processor where data was enqueued;

pointing a tail pointer to the oldest memory location in the set of most recent entries where data was enqueued;

determining whether a first memory location pointed to by tail pointer includes the empty symbol;

reading data from the first memory location, if the first memory location does not include the empty symbol; and

if the first memory location does not include the empty symbol, placing the empty symbol in the first memory location.

9. The method according to claim 8 , further comprising:

determining whether a second memory location includes the empty symbol;

reading data from the second memory location, if the second memory location does not include the empty symbol; and

placing the empty symbol in the second memory location, if the second memory location does not include the empty symbol.

10. The method according to claim 8 , wherein the empty symbol comprises the NULL pointer.

11. The method according to claim 8 , wherein if the first memory location does not include the empty symbol, the incrementing comprises incrementing the tail pointer to point to a second memory location after reading data from the first memory location.

12. A method comprising:

pointing a head pointer to the oldest empty memory location in a set of the most recent memory entries of a general purpose multi-core processor where data was enqueued;

pointing a tail pointer to the oldest memory location in the set of most recent entries where data was enqueued;

determining whether the memory location pointed to by the head pointer is empty;

if the memory location pointed to by the head pointer is empty, placing data in the memory location pointed to by the head pointer; and

incrementing the head pointer.

13. The method according to claim 12 , further comprising:

storing the head pointer in a memory location in a first cache line of the general purpose multi-core processor; and

storing the tail pointer in a memory location in a second cache line, wherein the first cache line and the second cache line comprise different cache lines.

14. The method according to claim 12 , wherein the determining whether the memory location pointed to by the head pointer is empty comprises determining whether the head pointer equals NULL.

15. The method according to claim 12 , wherein the determining whether the memory location pointed to by the head pointer is empty further comprises determining whether the memory location pointed to by the head pointer equals an empty symbol.

16. The method according to claim 12 , further comprising:

calculating a first distance between the head pointer and the tail pointer;

determining whether the first distance between the head pointer and the tail pointer is less than a threshold distance; and

if the first distance between the head pointer and the tail pointer is less than the threshold distance, pausing at least one of dequeue and enqueue.

17. The method according to claim 16 , further comprising:

if the first distance between the head pointer and the tail pointer is less than the threshold distance, waiting a period of time;

calculating a second distance between the head pointer and the tail pointer after the period of time;

determining whether the second distance between the head pointer and the tail pointer is less than the threshold distance; and

if the second distance between the head pointer and the tail pointer is less than the offset, pausing at least one of dequeue and enqueue.

18. A method comprising:

pointing a head pointer to the oldest empty memory location in a set of the most recent memory entries of a general purpose multi-core processor where data was enqueued;

pointing a tail pointer to the oldest memory location in the set of most recent entries where data was enqueued;

determining whether the memory location pointed to by tail pointer is empty;

if the memory location pointed to by the tail pointer is not empty, reading the data pointed to by the tail pointer;

setting the memory location pointed to by the tail pointer equal to the empty symbol; and

incrementing the tail pointer.

19. The method according to claim 18 , further comprising:

storing the head pointer in a memory location in a first cache line of the general purpose multi-core processor; and

storing the tail pointer in a memory location in a second cache line, wherein the first cache line and the second cache line comprise different cache lines.

20. The method according to claim 18 , wherein the determining whether the memory location pointed to by the tail pointer is empty comprises determining whether the tail pointer equals NULL.

21. The method according to claim 18 , further comprising:

calculating the distance between the head pointer and the tail pointer;

determining whether the distance between the head pointer and the tail pointer is less than a threshold distance; and

if the distance between the head pointer and the tail pointer is less than the threshold distance, pausing a dequeuing operation.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2008
From: GIACOMONI, JOHN; VACHHARAJANI, MANISH
To: THE REGENTS OF THE UNIVERSITY OF COLORADO
Reel/Frame 021179/0713 →
Continuity (2)
Provisional Application 60912979 · Apr 20, 2007
Related Publication 20080276056A1 · Nov 6, 2008