Stressed barrier plug slot contact structure for transistor performance enhancement
A method for forming a slot contact structure for transistor performance enhancement. A contact opening is formed to expose a contact region, and a slot contact is disposed within the contact opening in order to induce a stress on an adjacent channel region. In an embodiment, a stress inducing barrier plug is disposed within a portion of the contact opening and the remainder of the contact opening is filled with a lower resistivity contact metal. By selecting the proper materials and deposition parameters, the slot contact can be tuned to induce a tensile or compressive stress on the adjacent channel region, thus being applicable for both p-type and n-type devices.
1. A semiconductor structure comprising:
an NMOS transistor including a gate stack and a silicided source or drain contact region, the gate stack defining a channel region thereunder; and
a slot contact in contact with a portion of the silicided source or drain contact region below the gate stack, the slot contact being at least twice as long as it is wide, the slot contact comprising an intrinsically tensilely stressed tungsten barrier plug and a contact metal disposed over the intrinsically tensilely stressed tungsten barrier plug, the contact metal having a lower resistivity than the intrinsically tensilely stressed tungsten barrier plug;
wherein a bottom thickness of the intrinsically tensilely stressed tungsten barrier plug comprising a bottom portion of the slot contact is greater than a sidewall thickness of the intrinsically tensilely stressed tungsten barrier plug comprising a sidewall portion of the slot contact, and the bottom thickness of the intrinsically tensilely stressed tungsten barrier plug is both above and below a gate dielectric layer of the gate stack such that the slot contact induces a tensile stress on the channel region.
2. The structure of claim 1 , wherein the slot contact is approximately as long as the transistor width.
3. The structure of claim 1 , wherein the slot contact is longer than the transistor width.
4. The structure of claim 1 , wherein the volume of the contact metal in the slot contact is greater than the volume of the intrinsically tensilely stressed tungsten barrier plug in the slot contact.
5. The structure of claim 1 , wherein at least 10% of the total slot contact height is located below the gate stack.
6. The structure of claim 1 , wherein the contact metal comprises copper.
7. The structure of claim 1 , wherein the slot contact further comprises an adhesion layer below the intrinsically tensilely stressed tungsten barrier plug.
8. The structure of claim 7 , wherein the adhesion layer comprises titanium.
9. The structure of claim 8 , wherein the adhesion layer comprises titanium nitride.
10. The structure of claim 8 , wherein the adhesion layer comprises a titanium and titanium nitride bi-layer.
11. The structure of claim 1 , wherein the silicided source or drain contact region comprises a refractory metal-silicide.
12. The structure of claim 11 , wherein the refractory metal-silicide is selected from the group consisting of nickel-silicide, cobalt-silicide and titanium-silicide.
13. A semiconductor structure comprising:
a PMOS transistor including a gate stack and a silicided source or drain contact region, the gate stack defining a channel region thereunder; and
a slot contact in contact with a portion of the silicided source or drain contact region below the gate stack, the slot contact being at least twice as long as it is wide, the slot contact comprising an intrinsically compressively stressed tantalum nitride and tantalum bi-layer barrier plug and a contact metal disposed over the intrinsically compressively stressed tantalum nitride and tantalum bi-layer barrier plug, the contact metal having a lower resistivity than the intrinsically compressively stressed tantalum nitride and tantalum bi-layer barrier plug;
wherein a bottom thickness of the intrinsically compressively stressed tantalum nitride and tantalum bi-layer barrier plug comprising a bottom portion of the slot contact is greater than a sidewall thickness of the intrinsically compressively stressed tantalum nitride and tantalum bi-layer barrier plug comprising a sidewall portion of the slot contact, and the bottom thickness of the intrinsically compressively stressed tantalum nitride and tantalum bi-layer barrier plug is both above and below a gate dielectric layer of the gate stack such that the slot contact induces a compressive stress on the channel region.
14. The structure of claim 13 , wherein the contact metal comprises copper.
15. The structure of claim 13 , wherein the slot contact further comprises an adhesion layer below the intrinsically compressively stressed tantalum nitride and tantalum bi-layer barrier plug.
16. The structure of claim 15 , wherein the adhesion layer comprises titanium.
17. The structure of claim 15 , wherein the adhesion layer comprises titanium nitride.
18. The structure of claim 15 , wherein the adhesion layer comprises a titanium and titanium nitride bi-layer.
19. The structure of claim 13 , wherein the silicided source or drain contact region comprises a refractory metal-silicide.
20. The structure of claim 19 , wherein the refractory metal-silicide is selected from the group consisting of nickel-silicide, cobalt-silicide and titanium-silicide.