IP Library Granted Patent US 8,174,067
Granted Patent B2
US 8,174,067 · App. 12/417,586 · Granted May 8, 2012

Trench-based power semiconductor devices with increased breakdown voltage characteristics

Assignee: Fairchild Semiconductor Corporation
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,174,067
App. No.
12/417,586
Granted
May 8, 2012
Kind
B2
Abstract

Exemplary power semiconductor devices with features providing increased breakdown voltage and other benefits are disclosed.

Claims (73)

1. A semiconductor device comprising:

a first trench extending into a semiconductor region and having a first end and a second end;

a first dielectric layer lining opposing sidewalls of the first trench;

a first shield electrode disposed in the first trench;

a second trench extending into the semiconductor region and having a first end and a second end;

a second dielectric layer lining opposing sidewalls of the second trench;

a second shield electrode disposed in the second trench; and

a first well region of a first conductivity type disposed in the semiconductor region and between the first and second trenches, the first well region abutting at least a portion of at least one of the first and second trenches and being spaced from the first end of the first trench by at least a first distance; and

wherein there is no other well region of a first conductivity type disposed between the first well region and the first end of the first trench.

2. The semiconductor device of claim 1 , wherein the first well region is electrically coupled to a conductive layer to receive a potential.

3. The semiconductor device of claim 1 wherein the first trench extends to a first depth into the semiconductor region, and wherein the first distance is equal to the first depth.

4. The semiconductor device of claim 1 wherein the first trench extends to a first depth into the semiconductor region, wherein the first well region extends to a second depth into the semiconductor region, the second depth being less than the first depth, and wherein the first distance is equal to the difference between the first and second depths.

5. The semiconductor device of claim 1 , wherein the semiconductor region is disposed in a semiconductor die;

wherein the first ends of the first and second trenches face a first edge of the semiconductor die;

wherein a first portion of the semiconductor region is disposed between the first ends of the first and second trenches and the first edge of the semiconductor die; and

wherein the first portion does not have a perpendicular termination trench disposed in the semiconductor region.

6. The semiconductor device of claim 1 , wherein the first well region has a first end spaced from the first end of the first trench by at least the first distance, and wherein the device further comprises a field plate disposed over the first end of the first well region, the field plate being electrically coupled to the shield electrodes.

7. The semiconductor device of claim 1 , wherein the first well region has a first end spaced from the first end of the first trench by at least the first distance, and wherein there is no conductive layer disposed over the first end of the first well region that is electrically coupled to the shield electrodes.

8. A semiconductor device comprising:

a first trench extending into a semiconductor region and having a first end and a second end;

a first dielectric layer lining opposing sidewalls of the first trench;

a first shield electrode disposed in the first trench;

a second trench extending into the semiconductor region and having a first end and a second end;

a second dielectric layer lining opposing sidewalls of the second trench;

a second shield electrode disposed in the second trench; and

a first well region of a first conductivity type disposed in the semiconductor region and between the first and second trenches, the first well region being spaced from the first end of the first trench by at least a first distance; and

wherein the first trench extends to a first depth into the semiconductor region, wherein the first well region extends to a second depth into the semiconductor region, the second depth being less than the first depth, and wherein the first distance is equal to the difference between the first and second depths; and

wherein there is no other well region of a first conductivity type disposed between the first well region and the first end of the first trench.

9. The semiconductor device of claim 8 , wherein the first well region is electrically coupled to a conductive layer to receive a potential.

10. The semiconductor device of claim 8 , wherein the semiconductor region is disposed in a semiconductor die;

wherein the first ends of the first and second trenches face a first edge of the semiconductor die;

wherein a first portion of the semiconductor region is disposed between the first ends of the first and second trenches and the first edge of the semiconductor die; and

wherein the first portion does not have a perpendicular termination trench disposed in the semiconductor region.

11. The semiconductor device of claim 8 , wherein the first well region has a first end spaced from the first end of the first trench by at least the first distance, and wherein the device further comprises a field plate disposed over the first end of the first well region, the field plate being electrically coupled to the shield electrodes.

12. The semiconductor device of claim 8 , wherein the first well region has a first end spaced from the first end of the first trench by at least the first distance, and wherein there is no conductive layer disposed over the first end of the first well region that is electrically coupled to the shield electrodes.

13. A semiconductor device comprising:

a first trench extending into a semiconductor region and having a first end and a second end;

a first dielectric layer lining opposing sidewalls of the first trench;

a first shield electrode disposed in the first trench;

a second trench extending into the semiconductor region and having a first end and a second end;

a second dielectric layer lining opposing sidewalls of the second trench;

a second shield electrode disposed in the second trench; and

a first well region of a first conductivity type disposed in the semiconductor region and between the first and second trenches, the first well region being spaced from the first end of the first trench by at least a first distance; and

wherein there is no other well region of a first conductivity type disposed between the first well region and the first end of the first trench;

wherein the semiconductor region is disposed in a semiconductor die;

wherein the first ends of the first and second trenches face a first edge of the semiconductor die;

wherein a first portion of the semiconductor region is disposed between the first ends of the first and second trenches and the first edge of the semiconductor die; and

wherein the first portion does not have a perpendicular termination trench disposed in the semiconductor region.

14. The semiconductor device of claim 13 , wherein the first well region is electrically coupled to a conductive layer to receive a potential.

15. The semiconductor device of claim 13 , wherein the first well region has a first end spaced from the first end of the first trench by at least the first distance, and wherein the device further comprises a field plate disposed over the first end of the first well region, the field plate being electrically coupled to the shield electrodes.

16. The semiconductor device of claim 13 , wherein the first well region has a first end spaced from the first end of the first trench by at least the first distance, and wherein there is no conductive layer disposed over the first end of the first well region that is electrically coupled to the shield electrodes.

17. A semiconductor device comprising:

a first trench extending into a semiconductor region and having a first end and a second end;

a first dielectric layer lining opposing sidewalls of the first trench;

a first shield electrode disposed in the first trench;

a second trench extending into the semiconductor region and having a first end and a second end;

a second dielectric layer lining opposing sidewalls of the second trench;

a second shield electrode disposed in the second trench; and

a first well region of a first conductivity type disposed in the semiconductor region and between the first and second trenches, the first well region being spaced from the first end of the first trench by at least a first distance; and

wherein there is no other well region of a first conductivity type disposed between the first well region and the first end of the first trench; and

wherein the first well region has a first end spaced from the first end of the first trench by at least the first distance, and wherein the device further comprises a field plate disposed over the first end of the first well region, the field plate being electrically coupled to the shield electrodes.

18. The semiconductor device of claim 17 , wherein the first well region is electrically coupled to a conductive layer to receive a potential.

19. A semiconductor device comprising:

a first trench extending into a semiconductor region and having a first end and a second end;

a first dielectric layer lining opposing sidewalls of the first trench;

a first shield electrode disposed in the first trench;

a second trench extending into the semiconductor region and having a first end and a second end;

a second dielectric layer lining opposing sidewalls of the second trench;

a second shield electrode disposed in the second trench; and

a first well region of a first conductivity type disposed in the semiconductor region and between the first and second trenches, the first well region being spaced from the first end of the first trench by at least a first distance; and

wherein there is no other well region of a first conductivity type disposed between the first well region and the first end of the first trench; and

wherein the first well region has a first end spaced from the first end of the first trench by at least the first distance, and wherein there is no conductive layer disposed over the first end of the first well region that is electrically coupled to the shield electrodes.

20. The semiconductor device of claim 19 , wherein the first well region is electrically coupled to a conductive layer to receive a potential.

Assignments (7)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 058871, FRAME 0799 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 065653/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 040075, FRAME 0644 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0536 →
SECURITY INTEREST Recorded Nov 12, 2021
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 058871/0799 →
RELEASE OF SECURITY INTEREST Recorded Oct 28, 2021
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 057969/0206 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2021
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 057694/0374 →
PATENT SECURITY AGREEMENT Recorded Sep 19, 2016
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 040075/0644 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2010
From: YEDINAK, JOSEPH A.; CALAFUT, DANIEL; PROBST, DEAN E.
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 024616/0496 →
Continuity (2)
Provisional Application 61120818 · Dec 8, 2008
Related Publication 20100140696A1 · Jun 10, 2010