IP Library Granted Patent US 8,188,459
Granted Patent B2
US 8,188,459 · App. 12/577,892 · Granted May 29, 2012

Devices based on SI/nitride structures

Assignee: Massachusetts Institute of Technology
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Quick Facts
Patent No.
US 8,188,459
App. No.
12/577,892
Granted
May 29, 2012
Kind
B2
Abstract

A nitride-based semiconductor device is provided. The nitride-base semiconductor device includes a substrate comprising one or more locally etched regions and a buffer layer comprising one or multiple InAlGaN layers on the substrate. A channel layer includes GaN on the buffer layer. A barrier layer includes one or multiple AlGaN layers on the channel layer.

Claims (33)

1. A nitride-based semiconductor device comprising:

a substrate comprising one or more locally etched regions;

a buffer layer comprising one or multiple InAlGaN layers on the substrate;

a channel layer comprising GaN on the buffer layer; and

a barrier layer comprising one or multiple AlGaN layers on the channel layer.

2. The nitride-based semiconductor device of claim 1 , wherein the buffer layer comprises crystalline or amorphous layers.

3. The nitride-based semiconductor device of claim 1 , wherein the buffer layer comprises doped or undoped layers.

4. The nitride-based semiconductor device of claim 1 further comprising an AlN layer disposed between the channel and the barrier layer.

5. The nitride-based semiconductor device of claim 1 , wherein the substrate is partially etched to reduce the thickness of the substrate underneath the buffer layer.

6. The nitride-based semiconductor device of claim 1 , wherein the substrate is completely etched to expose the surface of the buffer layer.

7. The nitride-based semiconductor device of claim 6 , wherein the buffer layer is partially etched to reduce the thickness of the buffer layer underneath the channel layer.

8. The nitride-based semiconductor device of claim 6 , wherein the buffer layer is completely etched to expose the surface of the channel layer.

9. The nitride-based semiconductor device of claim 8 , wherein the channel layer is partially etched to reduce the thickness of the channel layer underneath the barrier layer.

10. A nitride-based semiconductor device comprising:

a substrate comprising one or more locally etched regions;

a buffer layer comprising one or more InAlGaN layers on the substrate;

an etch-stop layer comprising InAlGaN on the buffer layer;

a channel layer comprising GaN on the etch-stop layer; and

a barrier layer comprising one or more AlGaN layers on the channel layer.

11. The nitride-based semiconductor device of claim 10 , wherein the buffer layer comprises crystalline or amorphous layers.

12. The nitride-based semiconductor device of claim 10 , wherein the buffer layer comprises doped or undoped layers.

13. The nitride-based semiconductor device of claim 10 further comprising an AlN layer disposed between the channel and the barrier layer.

14. The nitride-based semiconductor device of claim 10 , wherein the substrate is partially or completely etched to expose the surface of the buffer layer.

15. The nitride-based semiconductor device of claim 14 , wherein the buffer layer is partially or completely etched to expose the surface of the etch-stop layer.

16. A field effect transistor comprising:

a substrate comprising one or more locally etched regions;

a buffer layer comprising one or more InAlGaN layers with one or more locally etched regions on the substrate;

a channel layer comprising GaN on the buffer layer;

a barrier layer comprising one or more AlGaN layers positioned on the channel layer;

a plurality of ohmic contacts in electrical communication with the channel layer to form a source or drain; and

one or more gate contacts on the barrier layer.

17. The field effect transistor of claim 16 further comprising an AlN layer disposed between the channel and the barrier layer.

18. The semiconductor device of claim 16 , wherein the one or more gate contacts are underneath the channel layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2009
From: PALACIOS, TOMAS; CHUNG, JINWOOK
To: MASSACHUSETTS INSTITUTE OF TECHNOLOGY
Reel/Frame 023391/0506 →
Continuity (3)
Continuation In Part PCTUS2008060200 · Apr 14, 2008
Provisional Application 60923094 · Apr 12, 2007
Related Publication 20100032717A1 · Feb 11, 2010