IP Library Granted Patent US 8,188,537
Granted Patent B2
US 8,188,537 · App. 12/704,955 · Granted May 29, 2012

Semiconductor device and production method therefor

Assignee: Unisantis Electronics Singapore Pte Ltd.
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Quick Facts
Patent No.
US 8,188,537
App. No.
12/704,955
Granted
May 29, 2012
Kind
B2
Abstract

It is intended to provide a semiconductor device including a MOS transistor, comprising: a semiconductor pillar; one of a drain region and a source region formed in contact with a lower part of the semiconductor pillar; a first gate formed around a sidewall of the semiconductor pillar through a first dielectric film therebetween; and an epitaxial semiconductor layer formed on a top surface of the semiconductor pillar, wherein the other of the source region and the drain region is formed so as to be at least partially in the epitaxial semiconductor layer, and wherein: the other of the source region and the drain region has a top surface having an area greater than that of the top surface of the semiconductor pillar.

Claims (18)

1. A semiconductor device including a MOS transistor, comprising:

a first MOS transistor, comprising:

a first semiconductor pillar;

one of a first drain region and a first source region formed in contact with a lower part of the first semiconductor pillar;

a first gate formed around a sidewall of the semiconductor pillar through a first dielectric film therebetween; and

an epitaxial semiconductor layer formed on a top surface of the first semiconductor pillar, wherein

the other of the first source region and the first drain region is formed so as to be at least partially in the epitaxial semiconductor layer,

and wherein:

the other of the first source region and the first drain region has a top surface having an area greater than that of the top surface of the semiconductor pillar; and

a second MOS transistor, comprising:

a second semiconductor pillar; and

one of a second drain region and a second source region formed in contact with a lower part of the second semiconductor pillar and directly connected with one of the first drain region and the first source region without a field oxide; and

the other of the second source region and the second drain region;

wherein the other of the first source region and the first drain region has an opposite conductivity type to that of the other of the second drain region and the second source region and the other of the first source region and the first drain region forms no junction with the other of the second drain region and the second source region.

2. The semiconductor device as defined in claim 1 , further comprising a silicide layer formed on a top surface of the other of the first source region and the first drain region.

3. The semiconductor device as defined in claim 2 , wherein a contact area between the silicide layer and the other of the first source region and the first drain region is larger than an area of the top surface of the semiconductor pillar.

4. The semiconductor device as defined in claim 1 , wherein the first MOS transistor comprises at least two semiconductor pillars, wherein the epitaxial semiconductor layers formed on the respective at least two semiconductor pillars are connected to each other to form a common source region or a drain region.

5. The semiconductor device as defined in claim 2 , wherein an area of a contact formed on the silicide layer is smaller than that of the top surface of the silicide layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 26, 2011
From: UNISANTIS ELECTRONICS JAPAN LTD.
To: UNISANTIS ELECTRONICS SINGAPORE PTE LTD.
Reel/Frame 026970/0670 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 3, 2010
From: MASUOKA, FUJIO; ARAI, SHINTARO
To: UNISANTIS ELECTRONICS (JAPAN) LTD.
Reel/Frame 024326/0254 →
Priority Claims (2)
WO PCT/JP2008/051300 · Jan 29, 2008 · international
JP 2009-109126 · Apr 28, 2009 · national
Continuity (4)
Continuation PCTJP2009051459 · Jan 29, 2009
Provisional Application 61207567 · Feb 13, 2009
Provisional Application 61217896 · Jun 4, 2009
Related Publication 20100213539A1 · Aug 26, 2010