IP Library Granted Patent US 8,188,677
Granted Patent B2
US 8,188,677 · App. 13/206,212 · Granted May 29, 2012

Multi-function duty cycle modifier

Assignee: Cirrus Logic, Inc.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,188,677
App. No.
13/206,212
Granted
May 29, 2012
Kind
B2
Abstract

A system and method modify phase delays of a periodic, phase modulated mains voltage to generate at least two independent items of information during each cycle of the periodic input signal. The independent items of information can be generated by, for example, independently modifying leading edge and trailing edge phase delays of each half cycle phase modulated mains voltage. Modifying phase delays for the leading and trailing edges of each half cycle of the phase modulated mains voltage can generate up to four independent items of data. The items of data can be converted into independent control signals to, for example, control drive currents to respective output devices such as light sources to provide multiple items of information per cycle.

Claims (10)

1. An apparatus comprising:

a dimming control to receive at least two respective inputs representing respective dimming levels;

a dimming signal generator, coupled to the dimming control, to generate a phase modulated output signal having at least two independently generated phase delays per cycle of the phase modulated mains voltage signal, wherein each dimming level is represented by one of the phase delays.

2. The apparatus of claim 1 wherein a first phase delay per cycle represents a first light emitting diode (LED) dimming level and a second phase delay per cycle represents a second LED dimming level.

3. The apparatus of claim 1 wherein a waveform of a cycle of the phase modulated output signal includes leading and trailing edge phase delays for both a first half cycle and a second half cycle of the waveform, and the first half cycle waveform and the second half cycle waveform have approximately equal areas.

4. A method comprising:

receiving at least two respective inputs representing respective dimming levels;

independently generating at least two phase delays per cycle in a mains voltage signal to generate a phase modulated output signal, wherein each phase delay per cycle represents a respective dimming level.

5. The method of claim 4 wherein a first phase delay per cycle represents a first light emitting diode (LED) dimming level and a second phase delay per cycle represents a second LED dimming level.

6. The method of claim 4 wherein a waveform of a cycle of the phase modulated output signal includes leading and trailing edge phase delays for both a first half cycle and a second half cycle of the waveform, and the first half cycle waveform and the second half cycle waveform have approximately equal areas.

Assignments (3)
CHANGE OF NAME Recorded Oct 28, 2019
From: PHILIPS LIGHTING HOLDING B.V.
To: SIGNIFY HOLDING B.V.
Reel/Frame 050837/0576 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2016
From: KONINKLIJKE PHILIPS N.V.
To: PHILIPS LIGHTING HOLDING B.V.
Reel/Frame 041170/0806 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 20, 2016
From: CIRRUS LOGIC, INC.
To: KONINKLIJKE PHILIPS N.V.
Reel/Frame 037563/0720 →
Continuity (4)
Division 12047258 · Mar 12, 2008
Provisional Application 60894295 · Mar 12, 2007
Provisional Application 60909457 · Apr 1, 2007
Related Publication 20110291587A1 · Dec 1, 2011