IP Library Granted Patent US 8,193,571
Granted Patent B2
US 8,193,571 · App. 12/542,276 · Granted Jun 5, 2012

Stacked type nonvolatile semiconductor memory device and method of manufacturing same

Assignee: Kabushiki Kaisha Toshiba
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Quick Facts
Patent No.
US 8,193,571
App. No.
12/542,276
Granted
Jun 5, 2012
Kind
B2
Abstract

A stacked body is formed on a silicon substrate by stacking a plurality of insulating films and a plurality of electrode films alternately and through-holes are formed to extend in the stacking direction. Next, gaps are formed between the electrode films using etching the insulating films via the through-holes. Charge storage layers are formed along side faces of the through-holes and inner faces of the gaps, and silicon pillars are filled into the through-holes. Thereby, a nonvolatile semiconductor memory device is manufactured.

Claims (33)

1. A nonvolatile semiconductor memory device comprising:

a stacked body in which a plurality of insulating films and a plurality of electrode films are alternately stacked and a through-hole is formed to extend in the stacking direction;

a semiconductor pillar filled into the through-hole;

a charge storage layer provided between the electrode film and the semiconductor pillar;

an insulative block layer provided between the electrode film and the charge storage layer; and

an insulative tunnel insulation layer provided between the semiconductor pillar and the charge storage layer,

a gap being formed between the electrode films to connect with the through-hole,

the charge storage layer being formed along an inner face of the gap, and

the formula

( tb+tc )×2 <S< ( tb+tc+tt )×2  (1)

being satisfied, where

S is a distance between the electrode films,

tb is a thickness of the block layer,

tc is a thickness of a charge storage layer, and

tt is a thickness of the tunnel insulation layer.

2. The device according to claim 1 , further comprising

an insulative tunnel insulation layer provided between the semiconductor pillar and the charge storage layer,

the tunnel insulation layer filling the gap.

3. The device according to claim 1 , wherein the gap connecting with the through-hole does not connect with another through-hole.

4. The device according to claim 3 , wherein a configuration of the gap is a circular ring configuration to enclose the through-hole.

5. The device according to claim 3 , further comprising

an insulative block layer provided between the electrode film and the charge storage layer,

the block layer being formed along an inner face of the gap and curved in a recessed configuration as viewed from a central axis of the through-hole.

6. The device according to claim 3 , further comprising

a tunnel insulation layer provided between the charge storage layer and the semiconductor pillar,

a portion of the tunnel insulation layer between the semiconductor pillar and one of the plurality of insulating films being thicker than a portion of the tunnel insulation layer between the semiconductor pillar and one of the plurality of electrode films.

7. The device according to claim 1 , wherein a second through-hole is formed in the stacked body to extend in the stacking direction, and the gap connects to the through-hole and to the second through-hole.

8. The device according to claim 7 , further comprising

an insulative block layer provided between the electrode film and the charge storage layer,

the block layer and the charge storage layer being formed along an upper face and a lower face of the gap.

9. The device according to claim 1 , further comprising

a second insulating film that divides the stacked body in one direction orthogonal to the stacking direction,

the gap not reaching the second insulating film.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043709/0035 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 6, 2009
From: KATSUMATA, RYOTA; KITO, MASARU; FUKUZUMI, YOSHIAKI; KIDOH, MASARU; TANAKA, HIROYASU; ISHIDUKI, MEGUMI; KOMORI, YOSUKE; AOCHI, HIDEAKI; MATSUOKA, YASUYUKI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 023329/0720 →
Priority Claims (1)
JP 2008-210109 · Aug 18, 2008 · national
Continuity (1)
Related Publication 20100038699A1 · Feb 18, 2010