IP Library Granted Patent US 8,195,894
Granted Patent B2
US 8,195,894 · App. 12/538,333 · Granted Jun 5, 2012

Data processing apparatus of basic input/output system

Assignee: Inventec Corporation
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Quick Facts
Patent No.
US 8,195,894
App. No.
12/538,333
Granted
Jun 5, 2012
Kind
B2
Abstract

A data processing apparatus of a basic input/output system (BIOS) is provided. The data processing apparatus includes a BIOS unit, a share memory and a control unit. The BIOS unit writes command data into the share memory, wherein the command data includes identification data stored in an identification field. The control unit reads and performs the command data according to the identification data in the identification field. After the command data is performed, the control unit writes returned data into the share memory for the BIOS unit to read the returned data, wherein the returned data includes the execution result of the command data performed by the control unit and also includes the identification data.

Claims (16)

1. A data processing apparatus of a basic input/output system, comprising:

a basic input/output system unit, for issuing command data, wherein the command data includes identification data and a command name;

a shared memory, coupled to the basic input/output system unit, wherein the basic input/output system unit writes the command data into the shared memory, and the identification data in the command data is stored in an identification field; and

a control unit, coupled to the shared memory, for reading and performing the command data according to the identification data in the identification field, and writing returned data into the shared memory for the basic input/output system unit to read the returned data, wherein the returned data is the executed result of the command data performed by the control unit, and the returned data includes the identification data.

2. The data processing apparatus of a basic input/output system as claimed in claim 1 , wherein the control unit reads and performs the command data when the identification data represents a non-zero value.

3. The data processing apparatus of a basic input/output system as claimed in claim 1 , wherein the command data further includes to-be-processed data.

4. The data processing apparatus of a basic input/output system as claimed in claim 3 , wherein the returned data further includes processing status data and processed data, wherein the process status data indicates the executed result of the command data performed by the control unit.

5. The data processing apparatus of a basic input/output system as claimed in claim 1 , wherein the shared memory includes a write memory block and a read memory block, wherein the basic input/output system stores the command data into the write memory block, and the control unit stores the returned data into the read memory block.

6. The data processing apparatus of a basic input/output system as claimed in claim 5 , wherein the control unit clears the command data in the read memory block after the control unit reads the command data.

7. The data processing apparatus of a basic input/output system as claimed in claim 5 , wherein the basic input/output system unit clears the returned data in the read memory block after the control unit reads the returned data.

8. The data processing apparatus of a basic input/output system as claimed in claim 4 , wherein the control unit issues an interrupt signal so as to notify the basic input/output system unit to read the returned data.

9. The data processing apparatus of a basic input/output system as claimed in claim 1 , wherein the shared memory comprises a read/write memory block, wherein the read/write memory block is used to store the command data and the returned data.

10. The data processing apparatus of a basic input/output system as claimed in claim 9 , wherein the command data further includes read/write status data and to-be-processed data, wherein the read/write status data is stored in a read/write status field for indicating an access status of the read/write memory block.

11. The data processing apparatus of a basic input/output system as claimed in claim 10 , wherein the access status of the read/write memory block includes a read/write status, a write status and a busy status, wherein the access status of the read/write memory block is the write status after the basic input/output system unit writes the command data, the access status of the read/write memory block is the busy status after the control unit reads the command data, and the access status of the read/write memory block is the read status after the control unit writes the returned data.

12. The data processing apparatus of a basic input/output system as claimed in claim 11 , wherein the returned data further comprises the read/write status data, processing status data and processed data, wherein the processing status data indicates the executed result of the command data performed by the control unit.

13. The data processing apparatus of a basic input/output system as claimed in claim 1 , wherein the control unit is an embedded controller.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2009
From: CHEN, CHUNG-HUI; GUO, JIA-SHIUNG
To: INVENTEC CORPORATION
Reel/Frame 023081/0227 →
Priority Claims (1)
TW 98114408 A · Apr 30, 2009 · national
Continuity (1)
Related Publication 20100281225A1 · Nov 4, 2010