IP Library Granted Patent US 8,202,238
Granted Patent B2
US 8,202,238 · App. 12/507,254 · Granted Jun 19, 2012

Method for manufacturing thin film integrated circuit device, noncontact thin film integrated circuit device and method for manufacturing the same, and idtag and coin including the noncontact thin film integrated circuit device

Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,202,238
App. No.
12/507,254
Granted
Jun 19, 2012
Kind
B2
Abstract

A thin film integrated circuit which is mass produced at low cost and a method for manufacturing a thin film integrated circuit according to the invention includes the steps of: forming a peel-off layer over a substrate; forming a base film over the peel-off layer; forming a plurality of thin film integrated circuits over the base film; forming a groove at the boundary between the plurality of thin film integrated circuits; and introducing a gas or a liquid containing halogen fluoride into the groove, thereby removing the peel-off layer; thus, the plurality of thin film integrated circuits are separated from each other.

Claims (33)

1. A plaster comprising:

a gauze; and

a thin film integrated circuit device comprising:

a flexible substrate;

a base film over the flexible substrate;

a thin film transistor over the base film, the thin film transistor comprising an island-shaped semiconductor film;

an interlayer insulating film over the thin film transistor, the interlayer insulating film comprising an organic material;

a wiring over the interlayer insulating film, the wiring being connected to the thin film transistor;

an antenna over the interlayer insulating film; and

a protective film over the wiring and the antenna, the protective film comprising an organic material.

2. A plaster according to claim 1 , wherein the thin film transistor has a top gate structure.

3. A plaster according to claim 1 , wherein the thin film transistor has a bottom gate structure.

4. A plaster according to claim 1 , wherein the island-shaped semiconductor film comprises silicon.

5. A plaster according to claim 4 , wherein the island-shaped semiconductor film comprises an amorphous semiconductor.

6. A plaster according to claim 4 , wherein the island-shaped semiconductor film comprises a crystalline semiconductor.

7. A plaster according to claim 4 , wherein the island-shaped semiconductor film comprises a microcrystalline silicon.

8. A plaster comprising:

a gauze; and

an integrated circuit device on a back side of the gauze, the integrated circuit device comprising:

a transistor;

a first insulating film over the transistor;

an antenna over the first insulating film; and

a second insulating film over the antenna, the second insulating film comprising an organic material.

9. A plaster according to claim 8 , wherein the transistor is a thin film transistor.

10. A plaster according to claim 8 wherein the transistor has a top gate structure.

11. A plaster according to claim 8 , wherein the transistor has a bottom gate structure.

12. A plaster according to claim 8 , wherein the transistor comprises a semiconductor film comprising silicon.

13. A plaster according to claim 8 , wherein the transistor comprises a semiconductor film comprising an amorphous semiconductor.

14. A plaster according to claim 8 , wherein the transistor comprises a semiconductor film comprising a crystalline semiconductor.

15. A plaster according to claim 8 , wherein the transistor comprises a semiconductor film comprising a microcrystalline silicon.

16. A plaster according to claim 8 ,

wherein the transistor is formed over a first substrate, and

wherein the antenna is formed over a second substrate.

Priority Claims (1)
JP 2003-417317 · Dec 15, 2003 · national
Continuity (2)
Continuation 10581674
Related Publication 20100025831A1 · Feb 4, 2010