Methods and apparatus to monitor instruction types and control power consumption within a processor
Methods and apparatus are disclosed to control power consumption within a processor. An example apparatus disclosed herein includes logic to identify at least one instruction type and to initialize a counter value corresponding to a maximum number of instructions to be performed, the maximum number being at least partially dependent upon the identified at least one instruction type. The example apparatus also includes processing logic to be enabled or disabled based, at least in part, on the counter value.
1. A processor comprising:
an instruction classifier logic to identify an instruction type of an instruction in response to receiving the instruction, wherein the instruction classifier is to include an opcode parser and a type detector, wherein the opcode parser is to determine an opcode component of the instruction and the type decoder is to generate a signal representative of a type of the instruction in response to receiving the opcode component;
a tracking state machine coupled to the instruction classifier, wherein the tracking state machine is to include a tracking counter and a tracking comparator, wherein a counter value in the tracking counter is set to a maximum count value if the type of the instruction received is the same as a type being tracked by the tracking state machine, wherein the tracking comparator is to generate control signals,
a power controller coupled to the tracking state machine, wherein the power controller is to enable or disable one or more processing logic based on the control signals;
a processing logic, of the one or more processing logic, to be enabled or disabled by the power controller; and
an instruction retirement unit to determine the maximum count value based on a maximum number of instructions that can be tracked by the instruction retirement unit.
2. The processor as defined in claim 1 , wherein the counter value is decremented if the type of the instruction received is not the same as the type being tracked by the tracking machine.
3. The processor as defined in claim 1 , wherein the power controller is to disable at least one functional block when the counter value is zero.
4. The processor as defined in claim 1 , wherein the processing logic is associated with a pipeline, the pipeline the functional block associated with the instruction type.
5. The processor as defined in claim 4 , wherein the functional block comprises at least one of an integer instruction type or a float instruction type.
6. A method to control pipeline processing comprises:
receiving an instruction in a pipeline;
identifying an instruction type of an instruction in response to receiving the instruction, wherein identifying the instruction type includes determining an opcode component of the instruction and generating a signal representative of a type of the instruction based on the opcode component;
determining a maximum count value based on a maximum number of instructions that can be tracked by an instruction retirement unit;
setting a counter value to the maximum count value in a tracking counter, wherein the counter value is set to the maximum count value if the type of the instruction received is the same as a type being tracked by the tracking state machine, wherein a tracking comparator is to generate control signals;
generating control signals based on the counter value; and
enabling or disabling the pipeline based on the control signals.
7. The method as defined in claim 6 , further comprising decrementing the counter value if the instruction type is not the same as the type being tracked.
8. The method as defined in claim 6 , wherein the instruction type comprises at least one of an integer instruction type or a float instruction type.
9. The method as defined in claim 6 further comprises enabling or disabling, of at least, a portion of the pipeline.
10. The method as defined in claim 9 , wherein the portion of the pipeline comprises at least one of an integer functional block or a float functional block.
11. The method as defined in claim 9 , wherein the portion of the pipeline is disabled when the counter value is zero.
12. An article of manufacturing storing machine readable instructions which, when executed, cause a machine to:
receive an instruction in a pipeline;
identify an instruction type of an instruction in response to receiving the instruction, wherein identifying the instruction type includes determining an opcode component of the instruction and generating a signal representative of a type of the instruction based on the opcode component;
determine a maximum count value based on a maximum number of instructions that can be tracked by an instruction retirement unit;
set a counter value to the maximum count value in a tracking counter, wherein the counter value is set to the maximum count value if the type of the instruction received is the same as a type being tracked by the tracking state machine, wherein a tracking comparator is to generate control signals;
generate control signals based on the counter value; and
enable or disable the pipeline based on the control signals.
13. An article of manufacture as defined in claim 12 , wherein the machine readable instructions, when executed, cause the machine to decrement the counter value if the instruction type is not the same as the type being tracked.
14. The article of manufacture as defined in claim 12 , wherein the machine readable instructions, when executed, cause the machine to enable or disable, at least, a portion of the pipeline.
15. An article of manufacture as defined in claim 14 , wherein the machine readable instructions, when executed, cause the machine to disable the portion of the pipeline when the value is zero.