Digital architecture for radio-frequency apparatus and associated methods
A radio-frequency (RF) receiver includes a receiver analog circuitry and a receiver digital circuitry. The receiver analog circuitry resides within a first integrated circuit and the receiver digital circuitry resides within a second integrated circuit. The second integrated circuit couples to the first integrated circuit via a one-bit digital interface. The receiver analog circuitry receives an RF signal and processes the received RF signal to generate a digital signal. The receiver analog circuitry provides the digital signal to the receiver digital circuitry. The receiver digital circuitry includes a digital down-converter circuitry that mixes the digital signal with an intermediate frequency (IF) local oscillator (LO) signal to generate a digital down-converted signal. The receiver digital circuitry also includes a digital filter circuitry that filters the digital down-converted signal to generate a filtered digital signal.
1. A radio-frequency (RF) apparatus, comprising:
a first circuit partition, comprising:
an amplifier that receives an RF signal, and provides an amplified RF signal;
a down-converter that mixes the amplified RF signal to generate a down-converted signal; and
an analog-to-digital converter that converts the down-converter signal to a digital signal, wherein the analog-to digital converter provides the digital signal as a one-bit digital signal; and
a second circuit partition, comprising:
a digital channelization filter that filters the digital signal to generate a filtered digital signal;
a digital down-converter that converts the filtered digital signal to generate a baseband signal; and
a digital to analog converter that coverts the baseband signal to an analog signal.
2. The radio-frequency (RF) apparatus according to claim 1 , wherein the first and second circuit partitions are isolated from each other.
3. The radio-frequency (RF) apparatus according to claim 1 , wherein the first and second circuit partitions reside within an integrated circuit (IC).
4. The radio-frequency (RF) apparatus according to claim 1 , wherein the first and second circuit partitions reside within a multi-chip module.
5. The radio-frequency (RF) apparatus according to claim 1 , wherein the first and second circuit partitions are part of a low-intermediate-frequency (low-IF) receiver.
6. The radio-frequency (RF) apparatus according to claim 5 , further comprising a transmitter coupled to a baseband processor circuit.
7. The radio-frequency (RF) apparatus according to claim 6 , wherein the low-intermediate-frequency (low-IF) receiver is coupled to the baseband processor circuit.
8. A digital receive-path circuit in a radio-frequency (RF) apparatus, the digital receive-path circuit comprising:
a cascaded integrator/comb (CIC) filter that filters a complex one-bit digital receive signal to generate a first filtered complex digital signal;
an infinite-impulse-response (IIR) filter that filters the first filtered complex digital signal to generate a second filtered complex digital signal; and
a digital down-converter that mixes the second filtered complex digital signal with a complex digital intermediate frequency (IF) local oscillator signal to generate a complex digital down-converted signal.
9. The digital receive-path circuit according to claim 8 , further comprising a digital intermediate frequency (IF) local oscillator circuit that supplies the complex digital IF local oscillator signal.
10. The digital receive-path circuit according to claim 8 , wherein the cascaded integrator/comb (CIC) filter comprises a decimator circuit, and a plurality of delay circuits.
11. The digital receive-path circuit according to claim 8 , wherein the infinite-impulse-response (IIR) filter comprises a plurality of biquad circuits.
12. The digital receive-path circuit according to claim 8 , further comprising a notch filter coupled to the digital down-converter circuitry.
13. The digital receive-path circuit according to claim 12 , wherein the notch filter comprises a plurality of delay circuits, and a plurality of combiner circuits.
14. The digital receive-path circuit according to claim 12 , wherein the notch filter comprises a complex band-pass filter circuitry arranged within a feedback loop.
15. A method of processing a radio-frequency (RF) signal, the method comprising:
amplifying the RF signal within a first circuit partition to generate an amplified RF signal;
mixing the amplified RF signal within the first circuit partition to generate a down-converted signal;
converting, within the first circuit partition, the down-converted signal to a digital signal;
supplying the digital signal to a second circuit partition;
digital channelization filtering the digital signal within the second circuit partition to generate a filtered digital signal;
converting, within the second circuit partition, the filtered digital signal to a baseband signal;
and digitally amplifying the baseband signal within the second circuit partition, using a programmable gain.
16. The method according to claim 15 , wherein the digital signal comprises a one-bit signal.
17. The method according to claim 15 , wherein the first and second circuit partitions are isolated from one another.
18. The method according to claim 15 , wherein the first and second circuit partitions reside within an integrated circuit (IC).
19. The method according to claim 15 , wherein the first and second circuit partitions are part of a low-intermediate-frequency (low-IF) receiver.