Memory device and method of multi-bit programming

1. A memory device comprising:

a plurality of memory units;

a data separator that separates data into a plurality of groups; and

a selector configured to rotate each of the plurality of groups and transmit a plurality of data sets, respectively, to corresponding ones of the plurality of memory units such that each of the plurality of memory units receives a different one of the plurality of data sets, each of the plurality of data sets including at least two of the plurality of groups,

wherein each of the plurality of memory units includes

one or more multi-bit cell arrays, and

one or more page buffers each corresponding to one of the one or more multi-bit cell arrays, respectively, and configured to receive a data set from among the plurality of data sets transmitted by the selector, and

wherein each of the one or more page buffers is configured to perform a plurality of programming operations, the plurality of programming operations each corresponding to a different number of threshold voltages with respect to the other programming operations from among the plurality of programming operations, and

wherein, for each of the one or more page buffers, the page buffer is configured to program the received data set in the multi-bit cell array corresponding to the page buffer by using a different one of the plurality of page programming operations for each of the at least two groups included in the received data set, the page programming operations used to program the at least two groups included in the received data set being used in a different order with respect to the other page buffers.

2. The memory device of claim 1 , wherein the data separator comprises:

a first encoder that performs first ECC encoding for the data to generate a codeword; and

a codeword separator that separates the codeword into the plurality of groups.

3. The memory device of claim 1 , wherein the selector is a demultiplexer controlled by an identification number assigned to each of the plurality of memory units.

4. The memory device of claim 1 , wherein the order of the page programming operation is associated with a number of threshold voltage states that are formed in the multi-bit cell arrays.

5. The memory device of claim 1 , wherein each of the page buffers determines the order of the page programming operation based on a bit error rate of a data page stored in each of the multi-bit cell arrays.

6. The memory device of claim 1 , wherein each of the plurality of memory units comprises at least:

a first multi-bit cell array;

a second multi-bit cell array;

a first page buffer that stores first data to be stored in the first multi-bit cell array; and a second page buffer that stores second data to be stored in the second multi-bit cell array,

wherein the first page buffer initially stores a first data page of the first data in the first multi-bit cell array and then stores a second data page of the first data in the first multi-bit cell array, and

the second page buffer initially stores a second data page of the second data in the second multi-bit cell array and then stores a first data page of the second data in the second multi-bit cell array.

7. The memory device of claim 6 , wherein the storing of the second data page of the first data by the first page buffer requires a longer period of time than a period of time of the storing of the first data page of the first data by the first page buffer, and the storing of the second data page of the second data by the second data buffer requires a longer period of time than a period of time of the storing of the first data page of the second data by the second page buffer.

8. A multi-bit programming method of a memory device having a controller, a plurality of page buffers, and a plurality of multi-bit cell arrays corresponding to the plurality of page buffers, the method comprising:

separating, by the controller, data into a plurality of groups;

rotating, by the controller, each of the plurality of groups and transmitting a plurality of data sets, respectively, to corresponding ones of the plurality of page buffers, each of the plurality of data sets including at least two of the plurality of groups;

storing, by each of the plurality of page buffers, the transmitted data set, the plurality of page buffers each corresponding to one of the plurality of multi-bit cell arrays, respectively, and being configured to receive a data set from among the plurality of data sets from the controller such that each of the plurality of page buffers receives a different one of the plurality of data sets;

performing a plurality of programming operations using each of the one or more page buffers, the plurality of programming operations each corresponding to a different number of threshold voltages with respect to the other programming operations from among the plurality of programming operations; and

for each of the one or more page buffers, programming the received data set in the multi-bit cell array corresponding to the page buffer by using a different one of the plurality of page programming operations for each of the at least two groups included in the received data set, the page programming operations used to program the at least two groups included in the received data set being used in a different order with respect to the other page buffers.

9. The method of claim 8 , wherein the separating comprises:

performing, by the controller, first ECC encoding for the data to generate a codeword; and

separating, by the controller, the codeword into the plurality of groups.

10. The method of claim 8 , further comprising:

performing, by the controller, ECC encoding for each of the separated groups,

wherein the rotating rotates each of the ECC encoded groups in an encoding order to transmit to each of the multi-bit cell arrays.

11. The method of claim 8 , wherein the programming comprises:

determining, by each of the plurality of page buffers, the order of the page programming operation based on a bit error rate of a data page stored in each of the plurality of multi-bit cell arrays; and

programming, by each of the plurality of page buffers, the stored group in each of the plurality of multi-bit cell arrays according to the determined order.

12. A computer-readable recording medium storing a program for implementing the method of claim 8 .