IP Library Granted Patent US 8,233,067
Granted Patent B2
US 8,233,067 · App. 12/655,536 · Granted Jul 31, 2012

Solid-state imaging device, signal processing method of solid-state imaging device, and image capturing apparatus

Assignee: Sony Corporation
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Quick Facts
Patent No.
US 8,233,067
App. No.
12/655,536
Granted
Jul 31, 2012
Kind
B2
Abstract

A solid-state imaging device includes: a plurality of pixel circuits each including a photoelectric conversion element; reading signal lines connected to the pixel circuits; a reference signal output circuit outputting a reference signal whose voltage level varies; a reference signal line connected to the reference signal output circuit; and comparators each having a first input terminal and a second input terminal and each inverting its output depending on a voltage relation of the first input terminal and the second input terminal, wherein the first input terminals of some of the comparators are connected to the reading signal lines and the second input terminals thereof are connected to the reference signal line, and wherein the first input terminals of the other of the comparators are connected to the reference signal line and the second input terminals thereof are connected to the reading signal lines.

Claims (43)

1. A solid-state imaging device comprising:

a plurality of pixel circuits each including a photoelectric conversion element;

a plurality of reading signal lines connected to the plurality of pixel circuits;

a reference signal output circuit outputting a reference signal whose voltage level varies;

a reference signal line connected to the reference signal output circuit; and

a plurality of comparators each having a first input terminal and a second input terminal and each inverting its output depending on a voltage relation of the first input terminal and the second input terminal,

wherein the first input terminals of some of the plurality of comparators are connected to the reading signal lines and the second input terminals thereof are connected to the reference signal line, and

wherein the first input terminals of the other of the plurality of comparators are connected to the reference signal line and the second input terminals thereof are connected to the reading signal lines.

2. The solid-state imaging device according to claim 1 , further comprising counters to which the outputs of the comparators are input, respectively,

wherein the reference signal output circuit changes the level of the reference signal in synchronization with the counters, and

wherein each counter counts until the output of the corresponding comparator is inverted in each period where the reference signal output circuit changes the level of the reference signal.

3. The solid-state imaging device according to claim 2 , wherein the reference signal output circuit changes the voltage level of the reference signal in a reset period before the outputs of the pixel circuits are read and changes the voltage level of the reference signal in a reading period where the outputs of the pixel circuits are read.

4. The solid-state imaging device according to claim 1 , wherein the plurality of photoelectric conversion elements capture a black-and-white image or a monochromatic image,

wherein the plurality of comparators are arranged in a line along one side of a pixel area in which the plurality of pixel circuits are two-dimensionally arranged in a matrix, and

wherein the plurality of reading signal lines are alternately connected to the first input terminals and the second input terminals in the arrangement order of the comparators.

5. The solid-state imaging device according to claim 1 , wherein the plurality of photoelectric conversion elements capture a black-and-white image or a monochromatic image,

wherein the plurality of comparators are arranged in two lines along two opposite sides of a pixel area in which the plurality of pixel circuits are two-dimensionally arranged in a matrix, and

wherein the plurality of reading signal lines are alternately connected to the first input terminals and the second input terminals in the arrangement order of the comparators in each line of the comparators.

6. The solid-state imaging device according to claim 1 , wherein a plurality of color components are assigned in a Bayer arrangement to the plurality of photoelectric conversion elements so as to capture a color image,

wherein the plurality of comparators are arranged in a line along one side of a pixel area in which the plurality of pixel circuits are two-dimensionally arranged in a matrix, and

wherein the plurality of reading signal lines are alternately connected to the first input terminals and the second input terminals in an arrangement order of sets, each of which includes two neighboring comparators in the arrangement order.

7. The solid-state imaging device according to claim 1 , wherein the plurality of comparators are arranged in a line along one side of a pixel area in which the plurality of pixel circuits are two-dimensionally arranged in a matrix, and

wherein the plurality of reading signal lines are connected to the first input terminals and the second input terminals so that a connection pattern to the first input terminals and the second input terminals forms a constant repeated pattern in the arrangement order of the comparators.

8. The solid-state imaging device according to claim 1 , wherein the first input terminal is a noninverting input terminal of each comparator,

wherein the second input terminal is an inverting input terminal of each comparator, and

wherein the outputs of the comparators whose second input terminal is connected to the reference signal line are connected to an inverting circuit.

9. The solid-state imaging device according to claim 1 , further comprising a plurality of switch circuits which are connected to the reading signal lines and the reference signal line and which connects one of the reading signal lines and the reference signal line to the first input terminal of the corresponding comparator and connects the other thereof to the second input terminal.

10. The solid-state imaging device according to claim 9 , further comprising a plurality of polarity matching circuits being connected to the output of the comparators and inverting the polarity of the output of the corresponding comparator.

11. A signal processing method of a solid-state imaging device comprising the steps of:

connecting some of a plurality of pixel circuits each having a photoelectric conversion element to a plurality of reading signal lines;

outputting a reference signal, a voltage level of which varies, to a reference signal line from a reference signal output circuit; and

comparing the voltage levels of the plurality of reading signal lines with the voltage level of the reference signal line using a combination of comparators whose first input terminal is connected to the corresponding reading signal line and a second input terminal is connected to the reference signal line and comparators whose first input terminal is connected to the reference signal line and the second input terminal is connected to the corresponding reading signal line as a plurality of comparators whose output is inverted depending on a voltage relation of the first input terminal and the second input terminal.

12. An image capturing apparatus comprising:

a solid-state imaging device; and

an optical system forming an image of a subject on the solid-state imaging device,

wherein the solid-state imaging device includes

a plurality of pixel circuits each including a photoelectric conversion element,

a plurality of reading signal lines connected to the plurality of pixel circuits,

a reference signal output circuit outputting a reference signal whose voltage level varies,

a reference signal line connected to the reference signal output circuit, and

a plurality of comparators each having a first input terminal and a second input terminal and each inverting its output depending on a voltage relation of the first input terminal and the second input terminal,

wherein the first input terminals of some of the plurality of comparators are connected to the reading signal lines and the second input terminals thereof are connected to the reference signal line, and

wherein the first input terminals of the other of the plurality of comparators are connected to the reference signal line and the second input terminals thereof are connected to the reading signal lines.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2009
From: KONDO, HIROYASU
To: SONY CORPORATION
Reel/Frame 023770/0172 →
Priority Claims (1)
JP P2009-001000 · Jan 6, 2009 · national
Continuity (1)
Related Publication 20100171853A1 · Jul 8, 2010