Semiconductor device and production method therefor
It is an object to allow an inverter to be made up using a single island-shaped semiconductor, so as to provide a semiconductor device comprising a highly-integrated SGT-based CMOS inverter circuit. The object is achieved by a semiconductor device which comprises an island-shaped semiconductor layer, a first gate dielectric film surrounding a periphery of the island-shaped semiconductor layer, a gate electrode surrounding a periphery of the first gate dielectric film, a second gate dielectric film surrounding a periphery of the gate electrode, a tubular semiconductor layer surrounding a periphery of the second gate dielectric film, a first first-conductive-type high-concentration semiconductor layer disposed on top of the island-shaped semiconductor layer, a second first-conductive-type high-concentration semiconductor layer disposed underneath the island-shaped semiconductor layer, a first second-conductive-type high-concentration semiconductor layer disposed on top of the tubular semiconductor layer, and a second second-conductive-type high-concentration semiconductor layer disposed underneath the tubular semiconductor layer.
1. A semiconductor device comprising:
an island-shaped silicon layer;
a first gate dielectric film surrounding the island-shaped silicon layer;
a gate electrode surrounding the first gate dielectric film;
a second gate dielectric film surrounding the gate electrode;
a tubular silicon layer surrounding the second gate dielectric film;
a first n+-type diffusion layer disposed on top of the island-shaped silicon layer;
a second n+-type diffusion layer disposed underneath the island-shaped silicon layer;
a first p+-type diffusion layer disposed on top of the tubular silicon layer;
a second p+-type diffusion layer disposed underneath the tubular silicon layer, and formed to contact directly with the second n+-type diffusion layer;
a third n+-type diffusion layer formed to contact directly with bottom of the second n+-type diffusion layer and bottom of the second p+-type diffusion layer; and
a silicon-metal compound layer formed to contact directly with a part where the second p+-type diffusion layer contacts with the third n+-type diffusion layer.
2. The semiconductor device as defined in claim 1 , wherein the island-shaped silicon layer and the tubular silicon layer are single-crystal silicon.
3. The semiconductor device as defined in claim 1 , which satisfies the following relation: Wp≈2Wn, wherein Wp is an inner circumferential length of the tubular silicon layer, and Wn is an outer circumferential length of the island-shaped silicon layer.
4. The semiconductor device as defined in claim 1 , which satisfies the following relation: Rp≈2Rn, wherein Rp is an inner radius of the tubular silicon layer, and Rn is a radius of the island-shaped silicon layer.
5. The semiconductor device as defined in claim 1 , which satisfies the following relation: Lp≈Ln, wherein Lp is a channel length of the tubular silicon layer, and Ln is a channel length of the island-shaped silicon layer.
6. The semiconductor device as defined in claim 1 , wherein
the first gate dielectric film is a dielectric film allowing an nMOS transistor to function as an enhancement type, wherein the nMOS transistor comprises the island-shaped silicon layer, the first gate dielectric film surrounding the island-shaped silicon layer, the gate electrode surrounding the first gate dielectric film, the first n+-type diffusion layer disposed on top of the island-shaped silicon layer and the second n+-type diffusion layer disposed underneath the island-shaped silicon layer;
the second gate dielectric film is a dielectric film allowing a pMOS transistor to function as an enhancement type, wherein the pMOS transistor comprises the second gate dielectric film surrounding the gate electrode, the tubular silicon layer surrounding the second gate dielectric film, the first p+-type diffusion layer disposed on top of the tubular silicon layer and the second p+-type diffusion layer disposed underneath the tubular silicon layer and formed to contact directly with the second n+-type diffusion layer; and
the gate electrode is made of a material allowing each of the nMOS transistor and the pMOS transistor to function as an enhancement type.
7. The semiconductor device as defined in claim 1 , wherein the island-shaped silicon layer is a p-type or non-doped island-shaped silicon layer; and the tubular silicon layer is an n-type or non-doped tubular silicon layer.
8. The semiconductor device as defined in claim 1 , which satisfies the following relation: Wp>Wn, wherein Wp is an inner circumferential length of the tubular silicon layer, and Wn is an outer circumferential length of the island-shaped silicon layer.
9. The semiconductor device as defined in claim 1 , which satisfies the following relation: Rp>Rn, wherein Rp is an inner radius of the tubular silicon layer, and Rn is a radius of the island-shaped silicon layer.