Manufacturing method for high voltage transistor
A manufacturing method for a high voltage transistor includes the following steps. A substrate is provided. A P-type epitaxial (P-epi) layer is provided above the substrate. An N-well is formed in the P-epi layer. A P-well is formed in the P-epi layer. Field oxide (FOX) layers are formed above the P-epi layer. A gate oxide (GOX) layer is formed between the FOX layers. P-type implants are doped into the P-well or N-type implants are doped into the N-well to adjust an electrical function of the high voltage transistor.
1. A manufacturing method for a high voltage transistor, the method comprising the steps of:
providing a substrate;
providing a P-type epitaxial (P-epi) layer above the substrate;
forming an N-well in the P-epi layer;
forming a P-well in the P-epi layer;
forming a plurality of field oxide (FOX) layers above the P-epi layer, wherein a flat surface of the P-well is exposed by one of the FOX layers;
forming a gate oxide (GOX) layer between the FOX layers; and
doping P-type implants into the P-well to adjust an electrical function of the high voltage transistor, wherein the P-type implants are disposed at whole of the flat surface of the P-well.
2. The method according to claim 1 , wherein the step of doping the P-type implants into the P-well is performed after the step of forming the FOX layers.
3. The method according to claim 1 , wherein the step of doping the P-type implants into the P-well is performed after the step of forming the GOX layer.
4. The method according to claim 1 , wherein a mask is adopted in the step of doping the P-type implants into the P-well, and the same mask is adopted in the step of forming the P-well.
5. The method according to claim 1 , further comprising, after the step of providing the P-epi layer, the step of:
forming an N-buried layer (NBL) on a surface of the substrate, the N-buried layer being located at a predetermined position of the P-well.
6. The method according to claim 5 , further comprising, after the step of forming the N-buried layer, the step of:
forming a P-CO layer above the surface of the substrate and the N-buried layer.
7. The method according to claim 1 , further comprising, before the step of forming the FOX layers, the step of:
forming a plurality of P-field layers at predetermined positions where the FOX layers are to be formed.
8. The method according to claim 1 , further comprising the steps of:
forming a first N+ region in the N-well;
forming a second N+ region in the P-well; and
forming a first P+ region in the P-well, the second N+ region being located between the first N+ region and the first P+ region.
9. The method according to claim 1 , further comprising the steps of:
forming a second P+ region in the P-well;
forming a third P+ region in the N-well; and
forming a third N+ region in the N-well, the third P+ region being located between the second P+ region and the third N+ region.