Semiconductor device and method of manufacturing semiconductor device
A lower electrode includes a metal-containing oxide layer having a thickness of 2 nm or less on the surface layer. A metal-containing oxide layer is formed by oxidizing the surface of the lower electrode. A dielectric film includes a first phase appearing at room temperature in the bulk state and a second phase appearing at a higher temperature than that in the first phase in the bulk state. The second phase has a higher relative permittivity than that of the first phase.
1. A semiconductor device comprising:
a substrate;
a transistor formed in said substrate;
a multilayer interconnect layer formed over said substrate and said transistor; and
a capacitive element formed in said multilayer interconnect layer,
wherein said capacitive element includes
a lower electrode including a metal,
a dielectric film, formed over said lower electrode, which is made of a metal oxide film, and
an upper electrode formed over said dielectric film,
said lower electrode includes an oxide layer having a thickness of 2 nm or less over the surface layer,
said dielectric film includes at least a first phase appearing at room temperature in the bulk state and a second phase appearing at a higher temperature than that in said first phase in the bulk state, wherein said first phase is a monoclinic phase, and said second phase is a tetragonal phase, and
said second phase has a higher relative permittivity than that of said first phase.
2. The semiconductor device as set forth in claim 1 , wherein said oxide layer includes said metal of one or more atomic layers.
3. The semiconductor device as set forth in claim 1 , wherein said oxide layer has a thickness of 0.5 nm or more.
4. The semiconductor device as set forth in claim 1 , wherein said lower electrode is a Ti nitride film or a Ti film.
5. The semiconductor device as set forth in claim 1 , wherein said dielectric film is a zirconium oxide film or a hafnium oxide film.
6. The semiconductor device as set forth in claim 1 , wherein said dielectric film includes said second phase at equal to or more than 0.2 times that of said first phase.
7. The semiconductor device as set forth in claim 1 , wherein said capacitive element is a three-dimensional type capacitive element.
8. The semiconductor device as set forth in claim 1 , wherein said capacitive element is a portion of a memory cell.
9. The semiconductor device as set forth in claim 1 , wherein said capacitive element is a capacitive element for decoupling.