Multi-CSI (cyclic shifted identity) sub-matrix based LDPC (low density parity check) codes
Multi-CSI (Cyclic Shifted Identity) sub-matrix based LDPC (Low Density Parity Check) codes. A CSI parameter set, that includes at least one dual-valued entry and may also include at least one single-valued entry, and/or at least one all-zero-valued entry, is employed to generate an LDPC matrix. One of the single-valued entries may be 0 (being used to generate a CSI matrix with cyclic shift value of 0, corresponding to an identity sub-matrix such that all entries along the diagonal have elements values of 1, and all other elements therein are 0). Once the LDPC matrix is generated, it is employed to decode an LDPC coded signal to make an estimate of an information bit encoded therein. Also, the LDPC matrix may itself be used as an LDPC generator matrix (or the LDPC generator matrix may alternatively be generated by processing the LDPC matrix) for use in encoding an information bit.
1. An apparatus, comprising:
a memory to store the CSI (Cyclic Shifted Identity) parameter set including at least one dual valued-entry and at least one single-valued entry;
an input to receive an LDPC (Low Density Parity Check) coded signal; and
an LDPC decoder to decode the LDPC coded signal using an LDPC matrix, including a plurality of sub-matrices each having the common size, such that at least one of the plurality of sub-matrices corresponding to the at least one dual valued-entry of a CSI parameter set and at least one additional of the plurality of sub-matrices corresponding to the at least one single-valued entry of the CSI parameter set; and wherein:
the at least one of the plurality of sub-matrices corresponding to the at least one dual valued-entry generated from a first preliminary CSI sub-matrix corresponding to a first portion of the at least one dual valued-entry and from a second preliminary CSI sub-matrix corresponding to a second portion of the at least one dual valued-entry.
2. The apparatus of claim 1 , wherein:
the LDPC matrix being partitioned into a left hand side matrix and a right hand side matrix; and
each sub-matrix within the right hand side matrix being a respective all zero-valued sub-matrix except those sub-matrices identified below in (a) and (b):
(a) each sub-matrix located on a diagonal of the right hand side matrix being a respective CSI sub-matrix; and
(b) in every row between a second row, which is below and adjacent to a top row, and a bottom row of the right hand side matrix, inclusive, each sub-matrix located on a left hand side of and adjacent to a sub-matrix located on the diagonal of the right hand side matrix being also a respective CSI sub-matrix.
3. The apparatus of claim 1 , further comprising:
an LDPC matrix generation circuitry to generate the at least one additional of the plurality of sub-matrices corresponding to the at least one single-valued entry of the CSI parameter set for a corresponding location within the LDPC matrix as determined by a location of the single-valued entry within the CSI parameter set.
4. The apparatus of claim 1 , further comprising:
an LDPC generator matrix generation circuitry to process the LDPC matrix to generate an LDPC generator matrix; and
an encoder circuitry to employ the LDPC generator matrix to encode at least one additional information bit to generate at least one additional LDPC coded signal.
5. The apparatus of claim 1 , wherein:
the apparatus being a communication device operative within at least one of a satellite communication system, a wireless communication system, a wired communication system, and a fiber-optic communication system.
6. An apparatus, comprising:
an input to receive an LDPC (Low Density Parity Check) coded signal; and
an LDPC decoder to decode the LDPC coded signal using an LDPC matrix, including a plurality of sub-matrices each having the common size, such that at least one of the plurality of sub-matrices corresponding to at least one dual valued-entry of a CSI (Cyclic Shifted Identity) parameter set and at least one additional of the plurality of sub-matrices corresponding to at least one single-valued entry of the CSI parameter set.
7. The apparatus of claim 6 , wherein:
the LDPC matrix being partitioned into a left hand side matrix and a right hand side matrix; and
each sub-matrix within the right hand side matrix being a respective all zero-valued sub-matrix except those sub-matrices identified below in (a) and (b):
(a) each sub-matrix located on a diagonal of the right hand side matrix being a respective CSI sub-matrix; and
(b) in every row between a second row, which is below and adjacent to a top row, and a bottom row of the right hand side matrix, inclusive, each sub-matrix located on a left hand side of and adjacent to a sub-matrix located on the diagonal of the right hand side matrix being also a respective CSI sub-matrix.
8. The apparatus of claim 7 , wherein:
each respective CSI sub-matrix located on the diagonal of the right hand side matrix identified above in (a) and (b) being a respective identity sub-matrix or a respective CSI matrix corresponding to a cyclic shift of 0.
9. The apparatus of claim 6 , wherein:
the at least one of the plurality of sub-matrices corresponding to the at least one dual valued-entry generated from a first preliminary CSI sub-matrix corresponding to a first portion of the at least one dual valued-entry and from a second preliminary CSI sub-matrix corresponding to a second portion of the at least one dual valued-entry.
10. The apparatus of claim 6 , further comprising:
a memory to store the CSI parameter set including the at least one dual valued-entry and the at least one single-valued entry.
11. The apparatus of claim 6 , further comprising:
an LDPC matrix generation circuitry to generate the at least one additional of the plurality of sub-matrices corresponding to the at least one single-valued entry of the CSI parameter set for a corresponding location within the LDPC matrix as determined by a location of the single-valued entry within the CSI parameter set.
12. The apparatus of claim 6 , further comprising:
an LDPC generator matrix generation circuitry to process the LDPC matrix to generate an LDPC generator matrix; and
an encoder circuitry to employ the LDPC generator matrix to encode at least one additional information bit to generate at least one additional LDPC coded signal.
13. The apparatus of claim 6 , wherein:
the apparatus being a communication device operative within at least one of a satellite communication system, a wireless communication system, a wired communication system, and a fiber-optic communication system.
14. A method for operating a communication device, the method comprising:
via an input of the communication device, receiving an LDPC (Low Density Parity Check) coded signal; and
decoding the LDPC coded signal using an LDPC matrix, including a plurality of sub-matrices each having the common size, such that at least one of the plurality of sub-matrices corresponding to at least one dual valued-entry of a CSI (Cyclic Shifted Identity) parameter set and at least one additional of the plurality of sub-matrices corresponding to at least one single-valued entry of the CSI parameter set.
15. The method of claim 14 , wherein:
the LDPC matrix being partitioned into a left hand side matrix and a right hand side matrix; and
each sub-matrix within the right hand side matrix being a respective all zero-valued sub-matrix except those sub-matrices identified below in (a) and (b):
(a) each sub-matrix located on a diagonal of the right hand side matrix being a respective CSI sub-matrix; and
(b) in every row between a second row, which is below and adjacent to a top row, and a bottom row of the right hand side matrix, inclusive, each sub-matrix located on a left hand side of and adjacent to a sub-matrix located on the diagonal of the right hand side matrix being also a respective CSI sub-matrix.
16. The method of claim 15 , wherein:
each respective CSI sub-matrix located on the diagonal of the right hand side matrix identified above in (a) and (b) being a respective identity sub-matrix or a respective CSI matrix corresponding to a cyclic shift of 0.
17. The method of claim 14 , further comprising:
generating the at least one of the plurality of sub-matrices corresponding to the at least one dual valued-entry generated from a first preliminary CSI sub-matrix corresponding to a first portion of the at least one dual valued-entry and from a second preliminary CSI sub-matrix corresponding to a second portion of the at least one dual valued-entry.
18. The method of claim 14 , further comprising:
within a memory of the communication device, storing the CSI parameter set including the at least one dual valued-entry and the at least one single-valued entry.
19. The method of claim 14 , further comprising:
processing the LDPC matrix to generate an LDPC generator matrix; and
encoding at least one additional information bit, using the LDPC generator matrix, to generate at least one additional LDPC coded signal.
20. The method of claim 14 , wherein:
the communication device operative within at least one of a satellite communication system, a wireless communication system, a wired communication system, and a fiber-optic communication system.