Semiconductor memory using IGBT, insulated gate bipolar transistor, as selective element
A semiconductor device includes a semiconductor substrate of a first conductivity type, a first insulating film region that is embedded in a trench formed on the semiconductor substrate, a gate electrode that covers a lower surface of the first insulating film region, and a gate insulating film that is provided between the gate electrode and the semiconductor substrate. The semiconductor device further includes a first diffusion region that covers a first side surface of the first insulating film region, a second diffusion region that covers a second side surface of the first insulating film region, and a third diffusion region that covers an upper surface of the second diffusion region. A selective element includes a field-effect transistor that is constituted by the gate electrode, the first diffusion region, and the second diffusion region, and a bipolar transistor that is constituted by the substrate and the second and third diffusion regions.
1. A semiconductor device comprising:
a semiconductor substrate of a first conductivity type including a trench having a bottom surface and an inner wall;
a gate insulating film that is formed on the bottom surface and a part of the inner wall of the trench;
a first gate electrode that is embedded in a lower portion of the trench so as to cover the gate insulating film;
a first cap insulating film that is embedded in an upper portion of the trench so as to cover the first gate electrode;
a first diffusion region that is formed in the semiconductor substrate and located on a first side surface of the first cap insulating film;
a second diffusion region that is formed in the semiconductor substrate and located on a second side surface of the first cap insulating film opposite to the first side surface; and
a third diffusion region that is formed in the semiconductor substrate located on the second side surface of the first cap insulating film and located between an upper surface of the semiconductor substrate and an upper surface of the second diffusion region, wherein
the first and second diffusion regions and the first gate electrode constitute a first field-effect transistor,
the second and third diffusion regions and the semiconductor substrate constitute a first bipolar transistor,
the first field-effect transistor and the first bipolar transistor constitute a first selective element,
the first and second diffusion regions have a second conductivity type opposite to the first conductivity type, and
the third diffusion region has the first conductivity type.
2. The semiconductor device as claimed in claim 1 , wherein an upper surface of the first gate electrode is located at a position lower than lower surfaces of the first and second diffusion regions.
3. The semiconductor device as claimed in claim 1 , wherein a sum of lengths of the second and third diffusion regions in a perpendicular direction that is perpendicular to the upper surface of the semiconductor substrate is substantially same as a length of the first diffusion region in the perpendicular direction.
4. The semiconductor device as claimed in claim 1 , further comprising a second cap insulating film,
wherein the second and third diffusion regions are sandwiched between the first and second cap insulating films.
5. The semiconductor device as claimed in claim 4 , further comprising a second gate electrode that is covered with a lower surface of the second cap insulating film.
6. The semiconductor device as claimed in claim 5 , further comprising a fourth diffusion region, wherein
the second cap insulating film is sandwiched between the second and fourth diffusion regions, and
the second gate electrode is supplied with an electric potential so as not to cause the second diffusion region and the fourth diffusion region being electrically conductive.
7. The semiconductor device as claimed in claim 1 , further comprising a memory element that is electrically connected to the third diffusion region.
8. The semiconductor device as claimed in claim 7 , wherein the memory element includes a phase-change memory element.
9. The semiconductor device as claimed in claim 1 , wherein an electric potential that brings the first bipolar transistor into conductive is supplied to the first diffusion region by turning the first field-effect transistor on.
10. The semiconductor device as claimed in claim 9 , further comprising a memory element that is electrically connected to the third diffusion region, wherein
an electric potential at which electrons are passed to the memory element is supplied to the semiconductor substrate by turning the first bipolar transistor on.
11. The semiconductor device as claimed in claim 1 , further comprising a second selective element that shares the first diffusion region and is constituted by a second field-effect transistor and a second bipolar transistor each having a structure symmetrical with the first selective element using the first diffusion region as an axis.
12. A semiconductor device comprising:
a semiconductor substrate of a first conductivity type;
a cap insulating film that is embedded in the semiconductor substrate and has a first side surface perpendicular to an upper surface of the semiconductor substrate, a second side surface opposite to the first side surface, and a lower surface opposite to the upper surface of the semiconductor substrate;
a first gate electrode of which whole of a body thereof is embedded in the semiconductor substrate and that is covered with a lower surface of the cap insulating film;
a gate insulating film of which whole of a body thereof is embedded in the semiconductor substrate and that is formed between the gate electrode and the semiconductor substrate;
a first diffusion region that covers the first side surface of the cap insulating film;
a second diffusion region that covers the second side surface of the cap insulating film; and
a first selective element that covers the second side surface of the cap insulating film and an upper surface of the second diffusion region, and has a third diffusion region in contact with the upper surface of the semiconductor substrate, wherein
the gate electrode and the first and second diffusion regions constitute a first field-effect transistor,
the semiconductor substrate and the second and third diffusion regions constitute a first bipolar transistor,
the field-effect transistor and the first bipolar transistor constitute the first selective element,
the first and second diffusion regions have a second conductivity type opposite to the first conductivity type, and
the third diffusion region has the first conductivity type.
13. The semiconductor device as claimed in claim 12 , wherein an upper surface of the first gate electrode is located at a position lower than lower surfaces of the first and second diffusion regions.
14. The semiconductor device as claimed in claim 12 , wherein a sum of lengths of the second and third diffusion regions in a perpendicular direction that is perpendicular to the upper surface of the semiconductor substrate is substantially same as a length of the first diffusion region in the perpendicular direction.
15. The semiconductor device as claimed in claim 12 , further comprising a second cap insulating film,
wherein the second and third diffusion regions are sandwiched between the first and second cap insulating films.
16. The semiconductor device as claimed in claim 15 , further comprising a second gate electrode that is covered with a lower surface of the second cap insulating film.
17. The semiconductor device as claimed in claim 16 , further comprising a fourth diffusion region, wherein
the second cap insulating film is sandwiched between the second and fourth diffusion regions, and
the second gate electrode is supplied with an electric potential so as not to cause the second diffusion region and the fourth diffusion region being electrically conductive.
18. The semiconductor device as claimed in claim 12 , further comprising a memory element that is electrically connected to the third diffusion region.
19. The semiconductor device as claimed in claim 18 , wherein the memory element includes a phase-change memory element.
20. The semiconductor device as claimed in claim 12 , wherein an electric potential that brings the first bipolar transistor into conductive is supplied to the first diffusion region by turning the first field-effect transistor on.
21. The semiconductor device as claimed in claim 20 further comprising a memory element that is electrically connected to the third diffusion region, wherein
an electric potential at which electrons are passed to the memory element is supplied to the semiconductor substrate by turning the first bipolar transistor on.
22. The semiconductor device as claimed in claim 12 , further comprising a second selective element that shares the first diffusion region and is constituted by a second field-effect transistor and a second bipolar transistor each having a structure symmetrical with the first selective element using the first diffusion region as an axis.