IP Library Granted Patent US 8,400,799
Granted Patent B2
US 8,400,799 · App. 12/740,432 · Granted Mar 19, 2013

Inverter circuit with controller for controlling switching elements based on a magnitude of output power

Inventors: Toshikazu Fujiyoshi (Osaka, JP); Hajime Katsushima (Osaka, JP); Kenji Morimoto (Osaka, JP); Satoshi Yamamura (Osaka, JP)
Assignee: Sansha Electric Manufacturing Co., Ltd.
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Quick Facts
Patent No.
US 8,400,799
App. No.
12/740,432
Granted
Mar 19, 2013
Kind
B2
Abstract

This inverter circuit includes first and second switching elements and an output transformer which is provided with a first primary winding connected in series between said first and second switching elements, and also with a secondary winding for obtaining an output voltage. The inverter circuit is further provided with a first voltage supply, a second voltage supply, and a control unit. The first voltage supply applies voltage to said first switching element via said first primary winding. And the second voltage supply applies voltage to said second switching element via said second primary winding. The control unit turns said first switching element and said second switching element alternatingly ON and OFF. This inverter circuit also includes first and second regeneration snubber circuits for regenerating the charge charged into snubber capacitors.

Claims (26)

1. An inverter circuit, comprising:

a first switching element;

a second switching element;

an output transformer, a primary side whereof is supplied with current via said first switching element and said second switching element, and from a secondary side whereof a current is outputted to a load;

a first free wheel diode connected in inverse parallel to said first switching element;

a second free wheel diode connected in inverse parallel to said second switching element;

a first snubber circuit, connected in parallel to said first switching element, and comprising a series circuit of a first snubber diode and a first snubber capacitor;

a second snubber circuit, connected in parallel to said second switching element, and comprising a series circuit of a second snubber diode and a second snubber capacitor;

a voltage supply which applies voltage to said first switching element and to said second switching element;

a first regeneration circuit connected between said first snubber circuit and to said voltage supply;

a second regeneration circuit connected between said second snubber circuit and to said voltage supply;

and wherein:

said first regeneration circuit includes a series circuit of a third switching element, a first reactor, and a first diode for regeneration;

said second regeneration circuit includes a series circuit of a fourth switching element, a second reactor, and a second diode for regeneration;

and further comprising:

a control unit which turns said first switching element and said second switching element alternatingly ON and OFF, and also turns said third switching element and said fourth switching element alternatingly ON and OFF; and

an output detection unit which detects the magnitude of output power;

and wherein said control unit controls the ON time periods of said third switching element and of said fourth switching element, according to the magnitude of output power detected by said output detection unit, wherein:

said output transformer comprises a first primary winding connected between the positive side of said first switching element and the positive side of said second switching element, and a second primary winding connected between the negative side of said first switching element and the negative side of said second switching element; and

said voltage supply comprises:

a first voltage supply, connected between a first connection point at which said first primary winding is connected to said second switching element, and said first switching element, and which applies a voltage to said first switching element via said first primary winding;

a second voltage supply, connected between a second connection point at which said first primary winding is connected to said first switching element, and said second switching element, and which applies a voltage to said second switching element via said first primary winding; and

a power supply, connected between a center tap of said first primary winding and a center tap of said second primary winding, and which supplies energy to said first and second voltage supplies via said first primary winding and said second primary winding.

2. An inverter circuit according to claim 1 , wherein said control unit: when the output power detected by said output detection unit is greater than some fixed power, sets the time period for which said third switching element and said fourth switching element are ON to a time period during which the charges in said first snubber capacitor and said second snubber capacitor are nearly completely discharged; and, when the output power detected by said output detection unit is less than said fixed power, sets the time period for which said third switching element and said fourth switching element are ON to a time period during which the charges in said first snubber capacitor and said second snubber capacitor are partially discharged.

3. An inverter circuit according to claim 1 , wherein said control unit: when the output power detected by said output detection unit is greater than some fixed power, sets the time period for which said third switching element and said fourth switching element are ON to a time period during which the charges in said first snubber capacitor and said second snubber capacitor are nearly completely discharged; and, when the output power detected by said output detection unit is less than said fixed power, sets the time period for which said third switching element and said fourth switching element are ON to zero.

4. An inverter circuit according to claim 1 , wherein said control unit sets the ON time period for said third switching element and said fourth switching element to be shorter, in response to detection of reduction of output power by said output detection unit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2010
From: FUJIYOSHI, TOSHIKAZU; KATSUSHIMA, HAJIME; MORIMOTO, KENJI; YAMAMURA, SATOSHI
To: SANSHA ELECTRIC MANUFACTURING CO., LTD.
Reel/Frame 024310/0489 →
Continuity (1)
Related Publication 20110216557A1 · Sep 8, 2011