IP Library Granted Patent US 8,418,157
Granted Patent B2
US 8,418,157 · App. 12/706,329 · Granted Apr 9, 2013

Compiler apparatus with flexible optimization

Inventors: Hajime Ogawa (Suita, JP); Taketo Heishi (Osaka, JP); Toshiyuki Sakata (Osaka, JP); Shuichi Takayama (Takarazuka, JP); Shohei Michimoto (Takatsuki, JP); Tomoo Hamada (Ibaraki, JP); Ryoko Miyachi (Hirakata, JP)
Assignee: Panasonic Corporation
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Quick Facts
Patent No.
US 8,418,157
App. No.
12/706,329
Granted
Apr 9, 2013
Kind
B2
Abstract

A compiler comprises an analysis unit that detects directives (options and pragmas) from a user to the compiler, an optimization unit that is made up of a processing unit (a global region allocation unit, a software pipelining unit, a loop unrolling unit, a “if” conversion unit, and a pair instruction generation unit) that performs individual optimization processing designated by options and pragmas from a user, following the directives and the like from the analysis unit, etc. The global region allocation unit performs optimization processing, following designation of the maximum data size of variables to be allocated to a global region, designation of variables to be allocated to the global region, and options and pragmas regarding designation of variables not to be allocated in the global region.

Claims (40)

1. A computing device comprising:

a processor; and

a compiler apparatus for translating a source program into a machine language program,

said compiler apparatus comprising:

a directive acquisition unit operable to acquire a directive for optimizing a machine language program to be generated; and

an optimization unit operable to perform optimization by generating a sequence of machine language instructions following the acquired directive,

wherein the directive acquisition unit detects a directive with a specific value for guaranteeing that data indicated by a pointer variable shown by the name of a specific variable in the source program is aligned by the specific value in a memory region, and

wherein the optimization unit generates a pair instruction for transferring two kinds of data at the same time regarding a memory access instruction for accessing the data to be aligned in the memory region.

2. A computing device comprising:

a processor; and

a compiler apparatus for translating a source program into a machine language program,

said compiler apparatus comprising:

a directive acquisition unit operable to acquire a directive for optimizing a machine language program to be generated; and

an optimization unit operable to perform optimization by generating a sequence of machine language instructions following the acquired directive,

wherein the directive acquisition unit detects a directive with a specific value for guaranteeing that a variable shown by the name of a specific variable in the source program is aligned by the specific value in a memory region, and

wherein the optimization unit generates a pair instruction for transferring two kinds of data at the same time regarding a memory access instruction for accessing the data to be aligned in the memory region.

3. A computing device comprising:

a processor; and

a compiler apparatus for translating a source program into a machine language program,

said compiler apparatus comprising:

a directive acquisition unit operable to acquire a directive for optimizing a machine language program to be generated; and

an optimization unit operable to perform optimization by generating a sequence of machine language instructions following the acquired directive,

wherein the directive acquisition unit detects a directive with a minimum number for guaranteeing a minimum number of iterations of specific loop processing when the number of iterations of specific loop processing is not specified in the source program, and

wherein the optimization unit performs optimization by software pipelining when the minimum number is specified by more than a certain number.

4. A computing device comprising:

a processor; and

a compiler apparatus for translating a source program into a machine language program,

said compiler apparatus comprising:

a directive acquisition unit operable to acquire a directive for optimizing a machine language program to be generated; and

an optimization unit operable to perform optimization by generating a sequence of machine language instructions following the acquired directive,

wherein the directive acquisition unit detects a directive with a minimum number for guaranteeing a minimum number of iterations of specific loop processing when the number of iterations of specific loop processing is not specified in the source program, and

wherein the optimization unit performs optimization by loop unrolling when the minimum number is specified by more than a certain number.

5. A computing device comprising:

a processor; and

a compiler apparatus for translating a source program into a machine language program,

said compiler apparatus comprising:

a directive acquisition unit operable to acquire a directive for optimizing a machine language program to be generated; and

an optimization unit operable to perform optimization by generating a sequence of machine language instructions following the acquired directive,

wherein the directive acquisition unit detects a directive for guaranteeing that the number of iterations of specific loop processing in the source program is one of a set of values, and

wherein the optimization unit performs the optimization by loop unrolling when the guaranteed set of values is a set of only even values.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 25, 2015
From: PANASONIC CORPORATION
To: SOCIONEXT INC.
Reel/Frame 035294/0942 →
Priority Claims (1)
JP 2002-195305 · Jul 3, 2002 · national
Continuity (2)
Division 10608040 · Jun 30, 2003
Related Publication 20100175056A1 · Jul 8, 2010