IP Library Granted Patent US 8,435,816
Granted Patent B2
US 8,435,816 · App. 13/059,213 · Granted May 7, 2013

Method for fabricating InGaAlN light emitting device on a combined substrate

Inventors: Chuanbing Xiong (Jiangxi, CN); Fengyi Jiang (Jiangxi, CN); Li Wang (Jiangxi, CN); Shaohua Zhang (Jiangxi, CN); Guping Wang (Jiangxi, CN); Guangxu Wang (Jiangxi, CN)
Assignee: Lattice Power (Jiangxi) Corporation
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Quick Facts
Patent No.
US 8,435,816
App. No.
13/059,213
Granted
May 7, 2013
Kind
B2
Abstract

One embodiment of the present invention provides a method for fabricating an InGaAlN light-emitting semiconductor structure. During the fabrication process, at least one single-crystal sacrificial layer is deposited on the surface of a base substrate to form a combined substrate, wherein the single-crystal sacrificial layer is lattice-matched with InGaAlN, and wherein the single crystal layer forms a sacrificial layer. Next, the InGaAlN light-emitting semiconductor structure is fabricated on the combined substrate. The InGaAlN structure fabricated on the combined substrate is then transferred to a support substrate, thereby facilitating a vertical electrode configuration. Transferring the InGaAlN structure involves etching the single-crystal sacrificial layer with a chemical etchant. Furthermore, the InGaAlN and the base substrate are resistant to the chemical etchant. The base substrate can be reused after the InGaAlN structure is transferred.

Claims (89)

1. A method for fabricating an InGaAlN light-emitting semiconductor structure, comprising:

depositing a first single-crystal sacrificial layer on the surface of a base substrate to form a combined substrate, wherein the first single-crystal sacrificial layer is lattice-matched with InGaAlN, and wherein the first single-crystal sacrificial layer comprises at least one of: GaAs, Ge, AlP, AlAs, GaP, GaSb, InP, InAs, InSb, ZnSe, ZnTe, CdS, CdSe, CdTe, HgSe, HgTePbS, PbSe, PbTe, GaP x As 1-x , Ga x Al 1-x As, MgAl 2 O 4 , LiGaO 2 , γ-LiAlO 2 , NdGaO 3 , ScAlMgO 4 , Ga 8 La 2 (PO 4 ) 6 O 2 , MoS 2 , LaAlO 3 , (Mn, Zn)Fe 2 O 4 , Hf, Zr, ZrN, Sc, ScN, NbN, and TiN; then

depositing a second single-crystal sacrificial layer on the first single-crystal sacrificial layer, wherein the base substrate and the first and second single-crystal sacrificial layers form a triple-layer combined substrate; then

epitaxially fabricating the InGaAlN light-emitting semiconductor structure on the combined substrate;

transferring the InGaAlN structure fabricated on the combined substrate to a support substrate, thereby facilitating a vertical electrode configuration;

covering a light-emitting surface of the InGaAlN structure with a passivation layer; and then

fabricating metal layers which are situated between the InGaAlN structure and the support substrate, wherein the metal layers comprise a p-side ohmic-contact layer, a light reflective layer, and a diffusion barrier layer; and

wherein the p-side ohmic-contact layer comprises a periodical matrix of segregated ohmic-contact pads;

wherein transferring the InGaAlN structure comprises etching the first single-crystal sacrificial layer with a chemical etchant;

wherein the InGaAlN and the base substrate are resistant to the chemical etchant; and

wherein the base substrate can be reused after the InGaAlN structure is transferred.

2. The method of claim 1 ,

wherein the base substrate comprises at least one of the following materials: sapphire, SiC, bulk GaN, bulk AlN, MgAl 2 O 4 , MgO, LiGaO 2 , γ-LiAlO 2 , NdGaO 3 , ScAlMgO 4 , Ga 8 La 2 (PO 4 ) 6 O 2 , MoS 2 , LaAlO 3 , (Mn, Zn)Fe 2 O 4 , Hf, Zr, ZrN, Sc, ScN, NbN, and TiN; and

wherein the first and the second single-crystal sacrificial layers further comprise at least one of the following materials: ZnO, ZnS, and MgO.

3. The method of claim 1 ,

wherein the thickness of the first single-crystal sacrificial layer is between 10 nm and 100 μm.

4. The method of claim 1 , further comprising pre-patterning the base substrate with grooves and mesas.

5. The method of claim 1 ,

wherein the first single-crystal sacrificial layer is pre-patterned with grooves and mesas.

6. The method of claim 5 ,

wherein the grooves that separate the mesas penetrate either the entire or part of the first single-crystal sacrificial layer.

7. The method of claim 1 ,

wherein fabricating the InGaAlN semiconductor structure comprises fabricating at least one of:

an AlN buffer layer,

a GaN buffer layer,

an n-type doped GaN layer,

an MQW light-emitting layer,

a p-type doped GaN layer.

8. The method of claim 1 ,

wherein the support substrate can be either a Si substrate or a metal substrate;

wherein the metal substrate can be either a pure metal substrate or an alloy substrate;

wherein the metal substrate can be either a single-layer metal substrate or a multilayer metal substrate; and

wherein if the metal substrate is not resistant to the chemical etchant, the backside of the metal substrate includes at least 500 Å of metal that is resistant to the chemical etchant.

9. The method of claim 8 ,

further comprising forming the metal substrate using at least one of the following techniques:

electroplating,

chemical plating,

ion plating,

thermal evaporation,

magnetron sputtering deposition, and

electro-beam (e-beam) evaporation.

10. The method of claim 8 ,

wherein the different layers in the multilayer metal substrate are selectively corrosive.

11. The method of claim 8 ,

wherein the metal substrate can be divided using at least one of the following techniques:

chemical etching;

mechanical scribing; and

mechanical dicing.

12. The method of claim 1 ,

further comprising fabricating an n-side electrode and a p-side electrode on either side of the InGaAlN structure in a vertical-electrode configuration;

wherein the n-side electrode comprises at least one of the following materials:

Au/Ge/Ni alloy;

Au/Si alloy;

Au/Si/Ni alloy;

TiN; and

Ti/Al alloy.

13. The method of claim 1 ,

wherein the p-side ohmic-contact layer comprises at least one of the following materials:

Pt;

Pd;

Rh; and

Ni.

14. The method of claim 1 ,

further comprising subjecting the light-emitting surface of the InGaAlN structure to a surface-coarsening process.

15. The method of claim 14 ,

wherein the depth of the patterns resulting from the surface-coarsening process is less than two-thirds of the thickness of an n-type doped layer of the InGaAlN structure.

16. The method of claim 14 ,

wherein the surface-coarsening process involves at least one of the following techniques:

photoelectric chemical etching;

chemical etching;

inductively coupled plasma (ICP) etching; and

reactive ion etching (RIE).

17. The method of claim 1 ,

wherein the passivation layer comprises at least one of the following materials:

SiO 2 ;

SiN;

Al 2 O 3 ; and

polyimide.

18. An InGaAlN light-emitting device fabricated by a process, wherein the process comprises:

depositing a first single-crystal sacrificial layer on the surface of a base substrate to form a combined substrate, wherein the first single-crystal sacrificial layer is lattice-matched with InGaAlN, and wherein the first single-crystal sacrificial layer comprises at least one of: GaAs, Ge, AlP, AlAs, GaP, GaSb, InP, InAs, InSb, ZnSe, ZnTe, CdS, CdSe, CdTe, HgSe, HgTePbS, PbSe, PbTe, GaP x As 1-x , Ga x Al 1-x As, MgAl 2 O 4 , LiGaO 2 , γ-LiAlO 2 , NdGaO 3 , ScAlMgO 4 , Ga 8 La 2 (PO 4 ) 6 O 2 , MoS 2 , LaAlO 3 , (Mn, Zn)Fe 2 O 4 , Hf, Zr, ZrN, Sc, ScN, NbN, and TiN; then

depositing a second single-crystal sacrificial layer on the first single-crystal sacrificial layer, wherein the base substrate and the first and second single-crystal sacrificial layers form a triple-layer combined substrate; then

epitaxially fabricating the InGaAlN light-emitting semiconductor structure on the combined substrate;

transferring the InGaAlN structure fabricated on the combined substrate to a support substrate, thereby facilitating a vertical electrode configuration;

covering a light-emitting surface of the InGaAlN structure with a passivation layer; and then

fabricating metal layers which are situated between the InGaAlN structure and the support substrate, wherein the metal layers comprise a p-side ohmic-contact layer, a light reflective layer, and a diffusion barrier layer; and

wherein the p-side ohmic-contact layer comprises a periodical matrix of segregated ohmic-contact pads;

wherein transferring the InGaAlN structure comprises etching the first single-crystal sacrificial layer with a chemical etchant;

wherein the InGaAlN and the base substrate are resistant to the chemical etchant; and

wherein the base substrate can be reused after the InGaAlN structure is transferred.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 3, 2011
From: XIONG, CHUANBING; JIANG, FENGYI; WANG, LI; ZHANG, SHAOHUA; WANG, GUPING; WANG, GUANGXU
To: LATTICE POWER (JIANGXI) CORPORATION
Reel/Frame 025898/0582 →
Continuity (1)
Related Publication 20110143467A1 · Jun 16, 2011