Method of fabricating polycrystalline silicon, TFT fabricated using the same, method of fabricating the TFT, and organic light emitting diode display device including the TFT

1. A method of fabricating a polycrystalline silicon (poly-Si) layer by a super grain silicon (SGS) crystallization method without forming a capping layer, comprising:

thermally oxidizing a surface of an amorphous silicon (a-Si) layer to form a thermal oxide layer on the a-Si layer;

forming a metal catalyst layer directly on the thermal oxide layer; and

annealing the a-Si layer having the thermal oxide layer and the metal catalyst layer formed thereon such that a controlled amount of metal from the metal catalyst layer diffuses through the thermal oxide layer to catalyze a crystallization of the a-Si layer into the poly-Si layer.

2. The method of fabricating a polycrystalline silicon (poly-Si) layer according to claim 1 , wherein the amount of metal from the metal catalyst layer that diffuses through the thermal oxide layer to catalyze a crystallization of the a-Si layer into the poly-Si layer is controlled by controlling the thickness of the thermal oxide layer.

3. The method of fabricating a polycrystalline silicon (poly-Si) layer according to claim 2 , wherein the thermally oxidizing of the surface of the a-Si layer is controlled to form a thermal oxide layer having a thickness of about 10 Å to 50 Å on the a-Si layer.

4. A method of fabricating a polycrystalline silicon (poly-Si) layer, comprising:

providing a substrate;

forming an amorphous silicon (a-Si) layer on the substrate;

forming a thermal oxide layer to a thickness of about 10 Å to 50 Å on the a-Si layer;

forming a metal catalyst layer on the thermal oxide layer; and

annealing the substrate to crystallize the a-Si layer into a poly-Si layer using a metal catalyst of the metal catalyst layer.

5. The method of fabricating a polycrystalline silicon (poly-Si) layer according to claim 4 , further comprising dehydrogenating the a-Si layer after forming the a-Si layer.

6. The method of fabricating a polycrystalline silicon (poly-Si) layer according to claim 5 , wherein the thermal oxide layer is formed during the dehydrogenating of the a-Si layer.

7. The method of fabricating a polycrystalline silicon (poly-Si) layer according to claim 4 , wherein the thermal oxide layer is formed by thermally oxidizing a surface portion of the a-Si layer in an atmosphere containing O 2 gas or moisture, and an inert gas.

8. The method of fabricating a polycrystalline silicon (poly-Si) layer according to claim 7 , wherein the inert gas includes N 2 gas.

9. The method of fabricating a polycrystalline silicon (poly-Si) layer according to claim 4 , wherein the thermal oxide layer is formed at a temperature of about 400° C. to 700° C.

10. The method of fabricating a polycrystalline silicon (poly-Si) layer according to claim 4 , wherein the a-Si layer is crystallized by a super grain silicon (SGS) crystallization method using the metal catalyst of the metal catalyst layer.

11. The method of fabricating a polycrystalline silicon (poly-Si) layer according to claim 4 , wherein the metal catalyst of the metal catalyst layer is formed at a concentration of about 10 12 to 10 14 atoms/cm 2 .

12. A method of fabricating a thin film transistor (TFT), comprising:

providing a substrate;

forming an a-Si layer on the substrate;

forming a thermal oxide layer to a thickness of about 10 Å to 50 Å on the a-Si layer;

forming a metal catalyst layer for crystallization on the thermal oxide layer;

annealing the substrate to crystallize the a-Si layer into a poly-Si layer using a metal catalyst of the metal catalyst layer for crystallization;

removing the metal catalyst layer;

patterning the thermal oxide layer and patterning the poly-Si layer to form a semiconductor layer;

forming a gate insulating layer on the substrate having the semiconductor layer and the thermal oxide layer;

forming a gate electrode on the gate insulating layer;

forming an interlayer insulating layer on the gate electrode; and

forming source and drain electrodes on the interlayer insulating layer to be electrically connected to source and drain regions of the semiconductor layer.

13. The method of fabricating a TFT according to claim 12 , further comprising dehydrogenating the a-Si layer after forming the a-Si layer.

14. The method of fabricating a TFT according to claim 13 , wherein the thermal oxide layer is formed during the dehydrogenating of the a-Si layer.

15. The method of fabricating a TFT according to claim 12 , wherein the thermal oxide layer is formed by thermally oxidizing a surface portion of the a-Si layer in an atmosphere containing O 2 gas or moisture, and inert gas.

16. The method of fabricating a TFT according to claim 15 , wherein the inert gas includes N 2 gas.

17. The method of fabricating a TFT according to claim 12 , wherein the thermal oxide layer is formed at a temperature of about 400° C. to 700° C.

18. The method of fabricating a TFT according to claim 12 , wherein the a-Si layer is crystallized by an SGS crystallization method using the metal catalyst of the metal catalyst layer.

19. The method of fabricating a TFT according to claim 12 , wherein the metal catalyst of the metal catalyst layer for crystallization is formed at a concentration of about 10 12 to 10 14 atoms/cm 2 .

20. A method of fabricating a thin film transistor (TFT), comprising:

providing a substrate;

forming a metal layer and patterning the metal layer to form a gate electrode;

forming a gate insulating layer on the gate electrode;

forming an a-Si layer on the gate insulating layer;

forming a thermal oxide layer to a thickness of about 10 Å to 50 Å on the a-Si layer;

forming a metal catalyst layer on the thermal oxide layer;

annealing the substrate to crystallize the a-Si layer into a poly-Si layer using a metal catalyst of the metal catalyst layer;

removing the metal catalyst layer and the thermal oxide layer;

patterning the poly-Si layer to form a semiconductor layer; and

forming and patterning source and drain electrodes on the semiconductor layer.

21. The method of fabricating a TFT according to claim 20 , further comprising forming and patterning an ohmic contact layer between the semiconductor layer and the source and drain electrodes.