IP Library Granted Patent US 8,448,042
Granted Patent B2
US 8,448,042 · App. 12/771,488 · Granted May 21, 2013

Data processing device and a method for error detection and error correction

Inventor: Manfred Spraul (Stuttgart, DE)
Assignee: Robert Bosch GmbH
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,448,042
App. No.
12/771,488
Granted
May 21, 2013
Kind
B2
Abstract

A data processing device and a method for error detection and error correction. The data processing device includes an error detection arrangement and an error correction arrangement. The error detection arrangement is able to detect correctable error and uncorrectable error in the data stored in a memory cell of the memory. The error detection arrangement then determines the neighboring memory cells or memory cells that are physically adjacent to the memory cell for which the correctable error was detected and generates a signal indicating a fault depending on the correctable errors detected in the neighboring physically adjacent memory cells. If a signal indicating a fault is not generated, then an error correction arrangement is used to correct the correctable error detected by the error detection arrangement.

Claims (24)

1. A data processing device, comprising:

an error detection arrangement adapted to:

receive data stored in a memory cell of a memory and detect correctable error and uncorrectable error in that data;

responsive to the detection of correctable error in the memory cell, determine memory cells that physically neighbor the memory cell in the memory, and detect whether there is correctable error in data stored in the determined neighboring memory cells; and

responsive to detection of correctable error in the data stored in the determined neighboring memory cells, generate a fault signal; and

an error correction arrangement adapted to correct a correctable error detected by the error detection arrangement.

2. The device of claim 1 , wherein the error detection arrangement is adapted to maintain a log of the correctable errors detected in data stored in the neighboring memory cells.

3. The device of claim 1 , wherein the error detection arrangement generates the fault signal if the number of correctable errors detected in the neighboring memory cells is at least one.

4. The device of claim 1 , wherein the error detection arrangement generates the fault signal if an uncorrectable error is detected in the neighboring memory cells.

5. The device of claim 1 , wherein the fault signal generated by the error detection arrangement reduces a functionality of the data processing device if at least one correctable error is detected in the neighboring memory cells.

6. The device of claim 1 , wherein the fault signal generated by the error detection arrangement stops further processing in a system using a data processing device if at least one correctable error is detected in the neighboring memory cells.

7. The device of claim 1 , wherein the fault signal generated by the error detection arrangement stops further processing in a system using the data processing device if an uncorrectable error is detected in the neighboring memory cells.

8. The device of claim 1 , where the fault signal generated by the error detection arrangement triggers an interrupt which reduces a functionality of a system using the data processing device if at least one correctable error is detected in the neighboring memory cells.

9. The device of claim 1 , wherein the fault signal generated by the error detection arrangement triggers an interrupt which stops further processing in a system using the data processing device if an uncorrectable error is detected in the neighboring memory cells.

10. The device of claim 1 , wherein memory cells are determined to physically neighbor the memory cell conditional upon being located within a predetermined physical distance from the memory cell.

11. A method of providing error detection and error correction, the method comprising:

receiving data stored in a memory cell of a memory;

detecting a correctable error and an uncorrectable error;

responsive to the detection of a correctable error in the memory cell:

determining memory cells that physically neighbor the memory cell for which a correctable error was detected; and

detecting whether there is correctable error in data stored in the

determined neighboring memory cells of the memory;

responsive to the detection of correctable error in the data stored in the determined neighboring memory cells, generating a fault signal, wherein correction of correctable error is conditional upon that the fault signal is not generated.

12. The method of claim 11 , wherein memory cells are determined to physically neighbor the memory cell conditional upon being located within a predetermined physical distance from the memory cell.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 12, 2010
From: SPRAUL, MANFRED
To: ROBERT BOSCH GMBH
Reel/Frame 024666/0904 →
Priority Claims (1)
EP 09161244 · May 27, 2009 · regional
Continuity (1)
Related Publication 20100306620A1 · Dec 2, 2010