IP Library Granted Patent US 8,450,186
Granted Patent B2
US 8,450,186 · App. 12/567,645 · Granted May 28, 2013

Optical modulator utilizing wafer bonding technology

Inventors: Haisheng Rong (Pleasanton, CA); Ansheng Liu (Cupertino, CA)
Assignee: Intel Corporation
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Quick Facts
Patent No.
US 8,450,186
App. No.
12/567,645
Granted
May 28, 2013
Kind
B2
Abstract

Optical modulator utilizing wafer bonding technology. An embodiment of a method includes etching a silicon on insulator (SOI) wafer to produce a first part of a silicon waveguide structure on a first surface of the SOI wafer, and preparing a second wafer, the second wafer including a layer of crystalline silicon, the second wafer including a first surface of crystalline silicon. The method further includes bonding the first surface of the second wafer with a thin oxide to the first surface of the SOI wafer using a wafer bonding technique, wherein a second part of the silicon waveguide structure is etched in the layer of crystalline silicon.

Claims (13)

1. A method comprising:

etching a silicon on insulator (SOI) wafer to produce a first part of a silicon waveguide structure on a first surface of the SOI wafer;

preparing a second wafer, the second wafer being a crystalline silicon wafer having a first surface of crystalline silicon and having an implant layer;

bonding the first surface of the second wafer with a thin oxide to the first surface of the SOI wafer using a wafer bonding technique; and

splitting the crystalline silicon wafer at the implant layer, wherein splitting the crystalline silicon wafer results in a layer of crystalline silicon above the oxide bonding layer;

wherein a second part of the silicon waveguide structure is etched in the layer of crystalline silicon.

2. The method of claim 1 , wherein the implant layer of the crystalline silicon wafer is a hydrogen implant layer.

3. The method of claim 1 , wherein splitting the crystalline silicon wafer include splitting utilizing Smart Cut™ technology.

4. The method of claim 1 , wherein the wafer bonding technique is an oxygen plasma assisted technique.

5. The method of claim 1 , wherein etching the first part of the waveguide structure in the SOI wafer includes lithography and reactive ion etching.

6. The method of claim 1 , wherein forming the second part of the silicon waveguide structure includes thinning the layer of crystalline silicon.

7. The method of claim 6 , wherein thinning the layer of crystalline silicon includes one or more of a chemical-mechanical polishing process or an oxidizing and etching process.

8. The method of claim 1 , wherein etching the second part of the waveguide structure includes lithography and reactive ion etching.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 25, 2009
From: RONG, HAISHENG; LIU, ANSHENG
To: INTEL CORPORATION
Reel/Frame 023287/0772 →
Continuity (1)
Related Publication 20110073989A1 · Mar 31, 2011