IP Library Granted Patent US 8,466,512
Granted Patent B2
US 8,466,512 · App. 12/858,840 · Granted Jun 18, 2013

Semiconductor device and production method thereof

Inventors: Fujio Masuoka (Tokyo, JP); Shintaro Arai (Tokyo, JP); Hiroki Nakamura (Tokyo, JP); Tomohiko Kudo (Tokyo, JP); R. Ramana Murthy (Singapore Science Park II, SG); Nansheng Shen (Singapore Science Park II, SG); Kavitha Devi Buddharaju (Singapore Science Park II, SG); Navab Singh (Singapore Science Park II, SG)
Assignee: Unisantis Electronics Singapore Pte Ltd.
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Quick Facts
Patent No.
US 8,466,512
App. No.
12/858,840
Granted
Jun 18, 2013
Kind
B2
Abstract

A method for producing a semiconductor device includes preparing a structure having a substrate, a planar semiconductor layer and a columnar semiconductor layer, forming a second drain/source region in the upper part of the columnar semiconductor layer, forming a contact stopper film and a contact interlayer film, and forming a contact layer on the second drain/source region. The step for forming the contact layer includes forming a pattern and etching the contact interlayer film to the contact stopper film using the pattern to form a contact hole for the contact layer and removing the contact stopper film remaining at the bottom of the contact hole by etching. The projection of the bottom surface of the contact hole onto the substrate is within the circumference of the projected profile of the contact stopper film formed on the top and side surface of the columnar semiconductor layer onto the substrate.

Claims (28)

1. A semiconductor device comprising:

a substrate;

a planar semiconductor layer on the substrate;

a columnar semiconductor layer on the planar semiconductor layer;

a first source or drain region at a bottom of the columnar semiconductor layer;

a second drain or source region in an upper part of the columnar semiconductor layer;

a gate insulating film around the columnar semiconductor layer;

a gate electrode on the gate insulating film so as to surround the columnar semiconductor layer;

a first contact layer on the second drain or source region;

a second contact layer on the first source or drain region; and

a third contact layer on a gate wire extending from the gate electrode,

wherein a side surface of the second contact layer is nearly perpendicular to the substrate, and an average inclination of a side surface of the first contact layer is larger than an average inclination of the side surface of the second contact layer, such that projections of an upper end of the first contact layer onto the substrate are larger than a circumference of a top part of the columnar semiconductor layer.

2. The semiconductor device according to claim 1 , an average inclination of a side surface of the third contact layer is larger than the average inclination of the side surface of the second contact layer.

3. The semiconductor device according to claim 1 , wherein a side surface of the third contact layer is nearly perpendicular to the substrate, and the average inclination of the side surface of the first contact layer is larger than an average inclination of the side surface of the third contact layer.

4. A semiconductor device comprising:

a substrate;

a columnar semiconductor layer above the substrate;

a first source or drain region at a bottom of the columnar semiconductor layer;

a second drain or source region in an upper part of the columnar semiconductor layer;

a gate insulating film around the columnar semiconductor layer;

a gate electrode on the gate insulating film so as to surround the columnar semiconductor layer;

a first contact layer on the second drain or source region;

a second contact layer on the first source or drain region;

a third contact layer on a gate wire extending from the gate electrode; and

a first insulating film sidewall contacting an upper sidewall of the columnar semiconductor layer and abutting the gate insulating film;

wherein a projection of a bottom surface of the first contact layer onto the substrate is within a circumference of a projected profile of the first insulating film sidewall onto the substrate.

5. The semiconductor device according to claim 4 , further comprising a contact stopper film on the first insulating film sidewall, wherein the first insulating film sidewall comprises a silicon oxide film, and the contact stopper film comprises a silicon nitride film.

6. The semiconductor device according to claim 5 , wherein the projection of the bottom surface of the first contact hole onto the substrate is within the circumference of a projected profile of the contact stopper film onto the substrate.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 26, 2011
From: UNISANTIS ELECTRONICS JAPAN LTD.
To: UNISANTIS ELECTRONICS SINGAPORE PTE LTD.
Reel/Frame 026970/0670 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2010
From: MASUOKA, FUJIO; ARAI, SHINTARO; NAKAMURA, HIROKI; KUDO, TOMOHIKO; MURTHY, B. RAMANA; SHEN, NANSHENG; BUDDHARAJU, KAVITHA DEVI; SINGH, NAVAB
To: UNISANTIS ELECTRONICS (JAPAN) LTD.
Reel/Frame 025234/0824 →
Priority Claims (1)
JP 2009-189262 · Aug 18, 2009 · national
Continuity (2)
Provisional Application 61274733 · Aug 19, 2009
Related Publication 20110042740A1 · Feb 24, 2011