Topography reduction and control by selective accelerator removal
Plating accelerator is applied selectively to a substantially-unfilled wide (e.g., low-aspect-ratio feature cavity. Then, plating of metal is conducted to fill the wide feature cavity and to form an embossed structure in which the height of a wide-feature metal protrusion over the metal-filled wide-feature cavity is higher than the height of metal over field regions. Most of the overburden metal is removed using non-contact techniques, such as chemical wet etching. Metal above the wide feature cavity protects the metal-filled wide-feature interconnect against dishing, and improved planarization techniques avoid erosion of the metal interconnect and dielectric insulating layer. In some embodiments, plating of metal onto a substrate is conducted to fill narrow (e.g., high-aspect-ratio feature cavities) in the dielectric layer before selective application of plating accelerator and filling of the wide feature cavity.
1. A method of conducting localized chemical wet etching of copper disposed on a surface of an integrated circuit substrate, comprising:
contacting the surface of the integrated circuit substrate with a liquid chemical isotropic copper etchant, wherein the liquid chemical isotropic copper etchant comprises an oxidizing agent and a complexing agent and has a pH of between 5 and 12; and
contacting the surface with a liquid quenchant and/or liquid diluent;
thereby establishing a treating area, said treating area less than the total area of the surface of the integrated circuit substrate and comprising that portion of the integrated circuit substrate contacted by the liquid copper etchant but not also contacted by the liquid quenchant and/or diluent.
2. The method of claim 1 , wherein the integrated circuit substrate is a semiconductor wafer and the treating area is an annular portion of the semiconductor wafer, the method further comprising:
(a) rotating the semiconductor wafer about a central axis, the central axis perpendicular to the surface of the semiconductor wafer;
(b) applying the liquid copper etchant to the surface at a first radial distance from the central axis; and
(c) applying the liquid quenchant and/or diluent to the surface at a second radial distance, larger than the first radial distance, from the central axis.
3. The method of claim 2 , wherein the order of execution is (a), followed by (b) and (c), wherein (b) and (c) are either simultaneous or sequential, (b) then (c), or (c) then (b).
4. The method of claim 2 , further comprising:
(d) applying the liquid copper etchant to the surface at a third radial distance, larger than the first radial distance, from the central axis;
(e) applying the liquid quenchant and/or diluent to the surface at a fourth radial distance, larger than the third radial distance, from the central axis.
5. The method of claim 4 , further comprising, prior to (d), applying the liquid quenchant and/or diluent to the annular portion of the surface of the semiconductor wafer sufficient to cease etching in the annular portion.
6. The method of claim 2 , wherein (b) and (c) are performed using an apparatus comprising at least one movable nozzle for applying the liquid copper etchant and/or the liquid quenchant and/or diluent.
7. The method of claim 2 , wherein (b) and (c) are performed using an apparatus comprising at least one nozzle for applying the liquid copper etchant and/or the liquid quenchant and/or diluent, wherein the apparatus also comprises a positioning mechanism for translating the semiconductor wafer along one or more vectors perpendicular to the surface of the semiconductor wafer.
8. The method of claim 2 , wherein the annular portion comprises a radial width of between about 2 mm and about 25 mm.
9. The method of claim 2 , wherein the annular portion comprises a radial width of between about 3 mm to about 8 mm.
10. The method of claim 4 , wherein the flowrate and/or the concentration of the liquid copper etchant and/or the liquid quenchant and/or diluent is different for (b) and (c) than for (d) and (e).