IP Library Granted Patent US 8,482,006
Granted Patent B2
US 8,482,006 · App. 13/160,700 · Granted Jul 9, 2013

Mother substrate, array substrate and method for manufacturing the same

Inventors: Huafeng Liu (Beijing, CN); Hongxi Xiao (Beijing, CN); Shunkang Su (Beijing, CN); Ping Wu (Beijing, CN); Hanting Ding (Beijing, CN)
Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.
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Quick Facts
Patent No.
US 8,482,006
App. No.
13/160,700
Granted
Jul 9, 2013
Kind
B2
Abstract

The present invention relates to a mother substrate and a method for manufacturing the same, the mother substrate comprising: a substrate, comprising at least one display region and pre-cutting regions in a periphery of the display region, wherein the display region comprises gate scanning lines and data scanning lines, the pre-cutting regions comprise a gate-line connecting line and a data-line connecting line electrically connected to each other, and the gate-line connecting line is electrically connected to all of the gate scanning lines in the display region, and the data-line connecting line is electrically connected to all of the data scanning lines in the display region substrate.

Claims (14)

1. A mother substrate comprising:

a substrate; comprising at least one display region and pre-cutting regions in a periphery of the display region,

wherein the display region comprises gate scanning lines and data scanning lines, the pre-cutting regions comprise a gate-line connecting line and a data-line connecting line electrically connected to each other, and

the gate-line connecting line is electrically connected to all of the gate scanning lines in the display region, and the data-line connecting line is electrically connected to all of the data scanning lines in the display region.

2. The mother substrate as claimed in claim 1 , wherein both the gate-line connecting line and the data-line connecting line are located at the same layer as the gate scanning lines, the gate-line connecting line and the data-line connecting line are directly and electrically connected, the gate-line connecting line is in direct electric connection with the gate scanning lines in the display region, and

the data-line connecting line is electrically connected to the data scanning lines of the display region via through holes.

3. The mother substrate as claimed in claim 1 , wherein both the gate-line connecting line and the data-line connecting line are located at the same layer as the data scanning lines, the gate-line connecting line and the data-line connecting line are directly and electrically connected, the data-line connecting line is in direct electric connection with the data scanning lines in the display region, and

the gate-line connecting line is electrically connected to the gate scanning lines of the display region via through holes.

4. The mother substrate as claimed in claim 1 , wherein the gate-line connecting line and the gate scanning lines are located at one same layer, and the gate-line connecting line is in direct electric connection with the gate scanning lines of the display region; the data-line connecting line and the data scanning lines are located at another same layer, and the data-line connecting line is in direct electric connection with the data scanning lines of the display region; and

the gate-line connecting line and the data-line connecting line are electrically connected via a through hole.

5. The mother substrate as claimed in claim 1 , wherein the gate-line connecting line is located in the pre-cutting region at one side opposite to a gate scanning line PAD region, and the data-line connecting line is located in the pre-cutting region at one side opposite to a data scanning line PAD region.

6. The mother substrate as claimed in claim 1 , wherein before the mother substrate is tested, the gate scanning lines are electrically disconnected with the gate-line connecting line, and the data scanning lines are electrically disconnected with the data-line connecting line.

7. The mother substrate as claimed in claim 6 , wherein a disconnection region of the data scanning line is located at a position where one data scanning line and the data-line connecting line are electrically connected, or located at a position which is shifted a predetermined distance from the position, where the data scanning line and the data-line connecting line are electrically connected, towards the data scanning line, and

a disconnection region of the gate scanning line is located at a position where one gate scanning line and the gate-line connecting line are electrically connected, or located at a position which is shifted a predetermined distance from the position, where the gate scanning line and the gate-line connecting line are electrically connected, towards the gate scanning line.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2015
From: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD
To: BOE TECHNOLOGY GROUP CO., LTD.; BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO. LTD
Reel/Frame 036644/0601 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TYPROGRAPHICAL ERROR IN THE FIFTH ASSIGNOR'S GIVEN NAME PREVIOUSLY RECORDED ON REEL 026447 FRAME 0147. ASSIGNOR(S) HEREBY CONFIRMS THE SPELLING OF THE FIFTH ASSIGNOR AS INDICATED IN THE ASSIGNMENT DOCUMENT. Recorded Jun 29, 2011
From: LIU, HUAFENG; XIAO, HONGXI; SU, SHUNKANG; WU, PING; DING, HANTING
To: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
Reel/Frame 026525/0118 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 15, 2011
From: LIU, HUAFENG; XIAO, HONGXI; SU, SHUNKANG; WU, PING; DING, HANGTING
To: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
Reel/Frame 026447/0147 →
Priority Claims (1)
CN 2010 1 0211521 · Jun 21, 2010 · national
Continuity (1)
Related Publication 20110309380A1 · Dec 22, 2011