Nonvolatile memory controller with logical defective cluster table
A controller includes a control unit for controlling writing and/or reading of data to and from physical block based on a logical address from a host device, a logical defective cluster table for storing information concerning a logical address of a logical defective cluster which is one or more partial areas within the effective logical address range and an address conversion table for storing corresponding information of a logical address of the effective logical address range and a physical address of the physical block on the data stored in the physical block. Upon receiving a data write command from the host device for writing data to the logical address stored in the logical defective cluster table, the control unit disables the reflection of writing of data for the logical address to the physical block.
1. A nonvolatile memory controller for controlling a nonvolatile memory configured from a plurality of physical blocks, the nonvolatile memory controller comprising:
a control unit for controlling writing and/or reading of data to and from a physical block, selected out of the plurality of physical blocks, based on a logical address received from an external device, within an effective logical address range from a minimum logical address to a maximum logical address;
a logical defective cluster table for storing, while the minimum logical address and the maximum logical address remain unchanged, a logical address of a logical defective cluster which is one or more partial areas within the effective logical address range and in which reflection of the writing of data to the logical address of the logical defective cluster is disabled; and
an address conversion table for storing logical addresses within the effective logical address range in correspondence with physical addresses of the plurality of physical blocks,
wherein, upon receiving a data write command from the external device for writing data to the logical address of the logical defective cluster stored in the logical defective cluster table, the control unit disables the reflection of writing of data for the logical address of the logical defective cluster stored in the logical defective cluster table.
2. The nonvolatile memory controller according to claim 1 ,
wherein, upon receiving a data read command from the external device for reading data from the logical address of the logical defective cluster stored in the logical defective cluster table, the control unit outputs predetermined fixed value data.
3. The nonvolatile memory controller according to claim 1 ,
wherein, upon receiving a data read command from the external device for reading data from the logical address of the logical defective cluster stored in the logical defective cluster table, the control unit does not output data.
4. The nonvolatile memory controller according to claim 1 ,
wherein, upon receiving a data write command from the external device for writing data to the logical address of the logical defective cluster stored in the logical defective cluster table, the control unit notifies the external device of an occurrence of a writing error.
5. The nonvolatile memory controller according to claim 1 , further comprising an invalid block table for storing a physical address of a physical block in which valid data is not stored and to which the writing of new data is capable of being performed,
wherein when a physical block accessed from the external device is a defective block and the and a number of physical blocks to which data from the external device is capable of being written is less than a predetermined value, the control unit selects a logical address to which access from the external device is disabled, registers the selected logical address to which access from the external device is disabled in the logical defective cluster table, and registers, in the invalid block table, the physical address in the address conversion table corresponding to the logical address to which access from the external device is disabled registered in the logical defective cluster table.
6. The nonvolatile memory controller according to claim 5 ,
wherein the control unit selects, as the logical address to which access from the external device is disabled, a logical address to which valid data is not written.
7. The nonvolatile memory controller according to claim 5 ,
wherein the control unit selects, as the logical address to which access from the external device is disabled, a logical address not corresponding to a valid physical address among the logical addresses stored in the address conversion table.
8. The nonvolatile memory controller according to claim 5 ,
wherein the defective block is a physical block in which a writing error or an erasure error has occurred.
9. A nonvolatile storage device, comprising:
the nonvolatile memory controller according to claim 1 ; and
a storage unit including the nonvolatile memory.
10. The nonvolatile storage device according to claim 9 ,
wherein the nonvolatile memory includes a flash memory.