Adaptive memory system for enhancing the performance of an external computing device
An adaptive memory system is provided for improving the performance of an external computing device. The adaptive memory system includes a single controller, a first memory type (e.g., Static Random Access Memory or SRAM), a second memory type (e.g., Dynamic Random Access Memory or DRAM), a third memory type (e.g., Flash), an internal bus system, and an external bus interface. The single controller is configured to: (i) communicate with all three memory types using the internal bus system; (ii) communicate with the external computing device using the external bus interface; and (iii) allocate cache-data storage assignment to a storage space within the first memory type, and after the storage space within the first memory type is determined to be full, allocate cache-data storage assignment to a storage space within the second memory type.
1. A non-transitory computer-readable medium having computer-executable instructions stored thereon that, if executed by a single controller of an adaptive memory system, causes the single controller to perform actions for implementing a data look-ahead caching scheme; wherein the adaptive memory system includes a first memory type, a second memory type, a third memory type, an internal bus system, and an external bus interface; and wherein the actions comprise: acquiring a sequence of sector data from an application run on an external computing device, wherein the sequence of sector data indicates a sequence of sectors from which data is requested, and wherein the sequence of sectors from which data is requested is arbitrarily ordered; comparing the acquired sequence of sector data to a plurality of previously stored sequences of sector data to determine if there is a high-probability match; caching at least the first memory type with a determined high-probability match if a high-probability match is determined between the acquired sequence of sector data and the plurality of previously stored sequences of sector data; and determining whether a most-likely sequence of sector data can be selected from the plurality of previously stored sequences of sector data if a high-probability match is not determined between the acquired sequence of sector data and the plurality of previously stored sequences of sector data.
2. The non-transitory computer-readable medium of claim 1 , wherein the first memory type is Static Random Access Memory (SRAM), the second memory type is Dynamic Random Access Memory (DRAM), and the third memory type is Flash Memory.
3. The non-transitory computer-readable medium of claim 1 , wherein the actions further comprise: caching a selected most-likely sequence of sector data into either the first memory type or the second memory type if a most-likely sequence of sector data can be selected; and initiating a cache-data training sequence if a most-likely sequence of sector data cannot be selected.
4. The non-transitory computer-readable medium of claim 3 , wherein the cache-data training sequence stores the acquired sequence of sector data within either the first memory type or the second memory type with a non-volatile copy of the sequence stored in the third memory type.
5. The non-transitory computer-readable medium of claim 4 , wherein the first memory type is Static Random Access Memory (SRAM), the second memory type is Dynamic Random Access Memory (DRAM), and the third memory type is Flash Memory.
6. A method for implementing a data look-ahead caching scheme of a single controller of an adaptive memory system, wherein the adaptive memory system includes a single controller, a first memory type, a second memory type, a third memory type, an internal bus system, and an external bus interface, the method comprising:
acquiring a sequence of sector data from an application run on an external computing device, wherein the sequence of sector data indicates a sequence of sectors from which data is requested, and wherein the sequence of sectors from which data is requested is arbitrarily ordered;
comparing the acquired sequence of sector data to a plurality of previously stored sequences of sector data to determine if there is a high-probability match;
caching the determined high-probability match data to at least the first memory type if a high-probability match is determined between the acquired sequence of sector data and the plurality of previously stored sequences of sector data; and
determining whether a most-likely sequence of sector data can be selected from the plurality of previously stored sequences of sector data if a high-probability match is not determined between the acquired sequence of sector data and the plurality of previously stored sequences of sector data.
7. The method of claim 6 , wherein the first memory type is Static Random Access Memory (SRAM), the second memory type is Dynamic Random Access Memory (DRAM), and the third memory type is Flash Memory.
8. The method of claim 6 , further comprising:
caching a selected most-likely sequence of sector data into either of the first memory type or the second memory type if a most-likely sequence of sector data can be selected; and
initiating a cache-data training sequence if a most-likely sequence of sector data cannot be selected.
9. The method of claim 8 , wherein the cache-data training sequence stores the acquired sequence of sector data within either the first memory type or the second memory type with a non-volatile copy of the sequence stored in the third memory type.
10. The method of claim 9 , wherein the first memory type is Static Random Access Memory (SRAM), the second memory type is Dynamic Random Access Memory (DRAM), and the third memory type is Flash Memory.