IP Library Granted Patent US 8,513,731
Granted Patent B2
US 8,513,731 · App. 12/588,491 · Granted Aug 20, 2013

Vertical type semiconductor device

Inventors: Seung-Jun Lee (Suwon-si, KR); Woonkyung Lee (Seongnam-si, KR)
Assignee: Samsung Electronics Co., Ltd.
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Quick Facts
Patent No.
US 8,513,731
App. No.
12/588,491
Granted
Aug 20, 2013
Kind
B2
Abstract

A vertical type semiconductor device including a first vertical semiconductor device on a semiconductor substrate, a second vertical semiconductor device on the first vertical semiconductor device, and an interconnection between the first and second vertical semiconductor devices.

Claims (35)

1. A vertical type semiconductor device, comprising:

a first vertical semiconductor device on a semiconductor substrate, the first vertical semiconductor device including a plurality of first memory cells;

a second vertical semiconductor device on the first vertical semiconductor device, the second vertical semiconductor device including a plurality of second memory cells; and

an interconnection between the first and second vertical semiconductor devices, wherein:

the first vertical semiconductor device includes a vertically stacked first word line structure and a first semiconductor structure disposed through the first word line structure,

the second vertical semiconductor device includes a vertically stacked second word line structure and a second semiconductor structure disposed through the second word line structure, and

the first semiconductor structure and the second semiconductor structure are directly connected in common to the interconnection.

2. The vertical type semiconductor device as claimed in claim 1 , wherein:

the interconnection is a bit line, and

the bit line is shared in the first and second vertical semiconductor devices.

3. The vertical type semiconductor device as claimed in claim 1 , wherein:

the interconnection is a common source line, and

the common source line is shared in the first and second vertical semiconductor devices.

4. The vertical type semiconductor device as claimed in claim 1 , wherein the first and second semiconductor structures are aligned with one another.

5. The vertical type semiconductor device as claimed in claim 1 , wherein the first and second semiconductor structures are offset from one another.

6. The vertical type semiconductor device as claimed in claim 1 , wherein at least one side of the first word line structure has a stair type structure and at least one side of the second word line structure has a stair type structure.

7. The vertical type semiconductor device as claimed in claim 6 , wherein the stair type structure of the first word line structure and the stair type structure of the second word line structure are disposed at opposite sides of the semiconductor device.

8. The vertical type semiconductor device as claimed in claim 6 , further comprising at least one contact plug connected to the stair type structure of at least one of the first word line structure and the second word line structure.

9. The vertical type semiconductor device as claimed in claim 1 , wherein the first vertical semiconductor device further includes a first string selection line structure and a first ground selection line structure.

10. The vertical type semiconductor device as claimed in claim 9 , wherein:

the first ground selection line structure is disposed under the first word line structure, and

the first string selection line structure is disposed above the first word line structure.

11. The vertical type semiconductor device as claimed in claim 10 , wherein the first ground selection line structure includes a first ground selection line, a first ground selection semiconductor structure, and a first ground selection gate dielectric between the first ground selection line and the first ground selection semiconductor structure.

12. The vertical type semiconductor device as claimed in claim 10 , wherein the first string selection line structure includes a first string selection line, a first string selection capping pattern, and a first string selection gate dielectric.

13. The vertical type semiconductor device as claimed in claim 1 , wherein the second vertical semiconductor device further includes a second string selection line structure and a second ground selection line structure.

14. The vertical type semiconductor device as claimed in claim 13 , wherein:

the second ground selection line structure is disposed under the second word line structure, and

the second string selection line structure is disposed above the second word line structure.

15. The vertical type semiconductor device as claimed in claim 14 , wherein the second ground selection line structure includes a second ground selection line, a second ground selection semiconductor structure, and a second ground selection gate dielectric between the second ground selection line and the second ground selection semiconductor structure.

16. The vertical type semiconductor device as claimed in claim 14 , wherein the second string selection line structure includes a second string selection line, a second string selection capping pattern, and a second string selection gate dielectric.

17. The vertical type semiconductor device as claimed in claim 1 , wherein the interconnection has a multi-layer structure.

18. The vertical type semiconductor device as claimed in claim 1 , wherein the interconnection includes at least one of a doped semiconductor material, a metal, and a metal compound.

19. The vertical type semiconductor device as claimed in claim 1 , wherein:

the first memory cells are connected in series, and

the second memory cells are serially connected in series.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 16, 2009
From: LEE, SEUNG-JUN; LEE, WOONKYUNG
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 023413/0052 →
Priority Claims (1)
KR 10-2008-0111394 · Nov 11, 2008 · national
Continuity (1)
Related Publication 20100117143A1 · May 13, 2010