I-shape floating gate for flash memory device and fabricating the same
The present invention discloses a floating gate structure of a flash memory device and a method for fabricating the same, which relates to a nonvolatile memory in a manufacturing technology of an ultra-large-scaled integrated circuit. In the invention, by modifying a manufacturing of a floating gate in the a standard process for the flash memory, that is, by adding three steps of deposition, two steps of etching and one step of CMP, an -shaped floating gate is formed. In addition to these steps, all the other steps are the same as those of the standard process for the flash memory process. By the invention, a coupling ratio may be improved effectively and a crosstalk between adjacent devices may be lowered, without adding additional photomasks and barely increasing a process complexity, which are very important to improve programming speed and reliability.
1. A floating gate structure of a flash memory device, wherein:
a cross section of the floating gate structure in a direction of a width of a channel is formed in a wherein the floating gate structure is divided into three parts comprising an upper part, a middle part and a lower part, and the upper part and the lower part are wider and the middle part is narrower, and the lower part and the upper part are formed to have a uniform width by stacking along an oxide layer in an isolation region, and
a height of the middle part of the occupies 40%-80% of a total height of the floating gate structure, and a width of the middle part of the occupies 5%-30% of a total width of the floating gate structure.
2. A method for fabricating a floating gate structure, a cross section of the floating gate structure in a direction of a width of a channel being formed in a wherein the floating gate structure is divided into three parts comprising an upper part, a middle part, and a lower part, and the upper part and the lower part are wider and the middle part is narrower, comprising:
growing a sacrificial silicon oxide layer and depositing a silicon nitride layer on a silicon substrate sequentially;
performing a photolithography process and an etching process on an active region to form a shallow trench isolation region;
depositing an oxide layer in the isolation region, removing the sacrificial silicon oxide layer and the silicon nitride layer, so as to open a window for a region of the floating gate structure;
growing or depositing a tunneling oxide layer, and then depositing a polysilicon floating gate and a germanium-silicon layer sequentially;
depositing a top polysilicon layer of the floating gate structure and performing an etching back process to form a polysilicon hard mask;
etching the germanium-silicon layer by taking the polysilicon hard mask as a hard mask, and stopping the etching at the bottom polysilicon layer of the floating gate structure;
depositing a polysilicon layer such that the top polysilicon layer of the floating gate structure and the bottom polysilicon layer of the floating gate structure are connected with each other;
performing a chemical mechanical polishing on the top polysilicon layer, and stopping the chemical mechanical polishing at the oxide layer of the isolation region;
etching back the oxide layer of the shallow trench isolation region to laterally expose the germanium-silicon layer deposited sequentially with the polysilicon floating gate;
removing the germanium-silicon material via a wet etching process, and depositing a blocking oxide layer; and
depositing a control gate polysilicon layer, so as to form a floating gate structure surrounded by the control gate polysilicon.
3. A flash memory device, wherein:
a cross section of a floating gate structure of the flash memory device in the direction of a width of a channel is formed in a wherein the floating gate structure is divided into three parts comprising an upper part, a middle part and a lower part, and the upper part and the lower part are wider and the middle part is narrower, and the lower part and the upper part are formed to have a uniform width by stacking along an oxide layer in an isolation region, and
wherein a height of the middle part of the occupies 40%-80% of a total height of the floating gate structure, and a width of the middle part of the occupies 5%-30% of a total width of the floating gate structure.