Semiconductor device and production method

1. A semiconductor device serving as an inverter, comprising:

a first island-shaped semiconductor layer;

a second semiconductor layer;

a gate electrode at least a part of which is between the first island-shaped semiconductor layer and the second semiconductor layer;

a first gate insulating film at least a part of which is between the first island-shaped semiconductor layer and a first surface of the gate electrode and is in contact with at least a part of the periphery of the first island-shaped semiconductor layer and a surface of the gate electrode;

a second gate insulating film between the second semiconductor layer and a second surface of the gate electrode opposite to the first surface and in contact with the second semiconductor layer and the second surface of the gate electrode, the second semiconductor layer contacting only a portion of the second gate insulating film opposite to the gate electrode,

wherein the second semiconductor layer has an arc shape and less area than a side of the first island-shaped semiconductor layer in proximity to the first surface of the gate electrode via the first gate insulating film;

a first first-conductive-type semiconductor layer on the top of the first island-shaped semiconductor layer;

a second first-conductive-type semiconductor layer on the bottom of the first island-shaped semiconductor layer and having a polarity identical to that of the first first-conductive-type semiconductor layer;

a first second-conductive-type semiconductor layer on the top of the second semiconductor layer and having a polarity opposite to that of the first first-conductive-type semiconductor layer; and

a second second-conductive-type semiconductor layer on the bottom of the second semiconductor layer and having a polarity opposite to that of the first first-conductive-type-semiconductor layer,

wherein the second first-conductive-type semiconductor layer contacts the second second-conductive-type semiconductor layer at an interface below the gate electrode.

2. A semiconductor device serving as an inverter, comprising a first transistor and a second transistor, wherein

the first transistor includes:

a first island-shaped semiconductor layer;

a first gate insulating film surrounding the periphery of the first island-shaped semiconductor layer;

a gate electrode surrounding the periphery of the first gate insulting film;

a first first-conductive-type semiconductor layer on the top of the first island-shaped semiconductor layer; and

a second first-conductive-type semiconductor layer on the bottom of the first island-shaped semiconductor layer and having a polarity identical to that of the first first-conductive-type semiconductor layer, and

the second transistor includes:

the gate electrode;

a second gate insulating film surrounding a part of the periphery of the gate electrode opposite to the first gate insulating film;

a second semiconductor layer contacting only a portion of the periphery of the second gate insulating film opposite to the gate electrode,

wherein the second semiconductor layer has an arc shape and has less area than the first island-shaped semiconductor layer in proximity to the gate electrode via the first gate insulating film;

a first second-conductive-type semiconductor layer on the top of the second semiconductor layer and having a polarity opposite to that of the first first-conductive-type high-concentration semiconductor layer; and

a second second-conductive-type semiconductor layer on the bottom of the second semiconductor layer and having a polarity opposite to that of the first first-conductive-type semiconductor layer,

wherein the second first-conductive-type semiconductor layer contacts the second second-conductive-type semiconductor layer at an interface below the gate electrode.

3. The semiconductor device according to claim 2 wherein the second semiconductor layer comprises a fan-shaped column.

4. The semiconductor device according to claim 2 wherein the semiconductor device further comprises:

a third first-conductive-type semiconductor layer on the bottom of the second first-conductive-type semiconductor layer and the second second-conductive-type semiconductor layer and having a polarity identical to that of the first first-conductive-type semiconductor layer;

a first semiconductor-metal compound layer formed on parts of the sidewalls of the second second-conductive-type semiconductor layer and the third first-conductive-type semiconductor layer;

a second semiconductor-metal compound layer on the top of the first first-conductive-type semiconductor layer; and

a third semiconductor-metal compound layer on the top of the first second-conductive-type semiconductor layer.

5. A semiconductor device serving as an inverter, comprising a first transistor and a second transistor, wherein

the first transistor includes:

an n-type island-shaped semiconductor layer;

a first gate insulating film surrounding the periphery of the island-shaped semiconductor layer;

a gate electrode surrounding the periphery of the first gate insulting film, a first surface of the gate electrode contacting the first gate insulting film;

a first p+ semiconductor layer on the top of the island-shaped semiconductor layer; and

a second p+ semiconductor layer on the bottom of the island-shaped semiconductor layer, and

the second transistor includes:

the gate electrode;

a second gate insulating film surrounding a part of the periphery of a second surface of the gate electrode opposite to the first gate insulating film;

a p-type semiconductor structure in contact with a part of the periphery of the second gate insulating film, the semiconductor structure contacting only a portion of the second gate insulating film opposite to the gate electrode,

wherein the semiconductor structure has an arc shape and has less area than the island-shaped semiconductor layer in proximity to the first surface of the gate electrode via the first gate insulating film;

a first n+ semiconductor layer on the top of the second semiconductor layer; and

a second n+ semiconductor layer on the bottom of the second semiconductor layer,

wherein the second p+ semiconductor layer contacts the second n+ semiconductor layer at an interface below the gate electrode.

6. The semiconductor device according to claim 5 , wherein Wp≈2 Wn in which Wn is the length of an arc along which the semiconductor structure is in contact with a part of the periphery of the second gate insulating film and Wp is the outer peripheral length of the island-shaped semiconductor layer.

7. The semiconductor device according to claim 6 , wherein Ln≈Lp in which Ln is the channel length of the semiconductor structure and Lp is the channel length of the island-shaped semiconductor layer.

8. The semiconductor device according to claim 5 , wherein:

the first gate insulating film comprises a material allowing the first transistor to operate as an enhancement mode;

the second gate insulating film comprises a material allowing the second transistor to operate as an enhancement mode;

the gate electrode comprises a material allowing the first transistor and the second transistor to operate as an enhancement mode.

9. The semiconductor device according to claim 8 wherein the gate electrode includes at least one selected form the group of consisting of titanium, titanium nitride, tantalum, tantalum nitride, and tungsten.

10. The semiconductor device according to claim 8 wherein the first gate insulating film includes at least one selected form the group of consisting of silicon oxynitride film, silicon nitride film, hafnium oxide, hafnium oxynitride, and lanthanum oxide.

11. The semiconductor device according to claim 8 wherein the second gate insulating film includes at least one selected form the group of consisting of silicon oxynitride film, silicon nitride film, hafnium oxide, hafnium oxynitride, and lanthanum oxide.

12. The semiconductor device according to claim 5 , wherein:

the island-shaped semiconductor layer comprises a first island-shaped silicon layer;

the semiconductor structure comprises a silicon structure;

the first n+ type semiconductor layer comprises a first n+ type silicon layer;

the second n+ type semiconductor layer comprises a second n+ type silicon layer;

the first p+ type semiconductor layer comprises a second p+ type silicon layer; and

the second p+ type semiconductor layer comprises a second p+ type silicon layer.