IP Library Granted Patent US 8,564,260
Granted Patent B2
US 8,564,260 · App. 12/971,758 · Granted Oct 22, 2013

Dual-stage power conversion

Inventors: Francesco Carobolante (San Diego, CA); Aleksandar Prodic (Toronto, CA)
Assignee: QUALCOMM Incorporated
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Quick Facts
Patent No.
US 8,564,260
App. No.
12/971,758
Granted
Oct 22, 2013
Kind
B2
Abstract

A circuit converts an input voltage to an output voltage. The circuit includes a first stage voltage converter that receives the input voltage and converts the input voltage. The first stage voltage converter includes a first buck converter having a double rail output: a first rail at a high intermediate voltage and a second rail at a low intermediate voltage. The circuit also includes a second stage voltage converter that receives the output rails and produces the output voltage.

Claims (32)

1. A circuit that converts an input voltage to an output voltage, the circuit comprising:

a first stage voltage converter that receives the input voltage and converts the input voltage, the first stage voltage converter comprising a first rail at a high intermediate voltage and a second rail at a low intermediate voltage; the low intermediate voltage above ground; the first stage voltage converter comprising a first inductor;

a first capacitor at the high intermediate voltage;

a second capacitor at the low intermediate voltage;

a first transistor to couple the first inductor to the first capacitor when switched on;

a second transistor to couple the first inductor to the second capacitor when switched on;

a switch controller to control the duty cycles of the first and second transistors to control a voltage difference between the high intermediate voltage and the low intermediate voltage; and

a second stage voltage converter that receives the high intermediate voltage and the low intermediate voltage and produces the output voltage; the second stage voltage converter comprising a second inductor; a third transistor to provide the high intermediate voltage to the second inductor when switched on; a fourth transistor to provide the low intermediate voltage to the second inductor when switched on; and a control circuit to control the duty cycles of the third and fourth transistors to hold the output voltage within a desired range.

2. The circuit of claim 1 in wherein the first stage voltage converter comprises a first buck converter and the second stage voltage converter comprises a second buck converter.

3. The circuit of claim 1 in which a difference between the high intermediate voltage and the low intermediate voltage is less than the output voltage.

4. The circuit of claim 1 , in which the circuit is integrated into a semiconductor die.

5. The circuit of claim 1 in which the second stage voltage converter is integrated into a semiconductor die with a load that utilizes the output voltage.

6. The circuit of claim 1 in which the first stage voltage converter operates at a first frequency and in which the second stage voltage converter operates at a second frequency higher than the first frequency.

7. The circuit of claim 6 in which the first frequency is less than one one-hundredth of the second frequency.

8. The circuit of claim 1 incorporated into a device selected from a group consisting of a music player, a video player, an entertainment unit, a. navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, and a computer.

9. A circuit hat converts an input voltage to an output voltage, the circuit comprising:

means for generating first and second intermediate voltages from the input voltage, the means for generating first and second intermediate voltages comprising

a first capacitor at the first intermediate voltage;

a second capacitor at the second intermediate voltage:

a first transistor to couple the first inductor to the first capacitor when switched on;

a second transistor to couple the firs in( actor to the second capacitor when switched on; and

a switch controller to control the duty cycles of the first and second transistors to control a voltage difference between the first intermediate voltage and the second intermediate voltage; and

means for producing the output voltage from the high and low intermediate voltages the means for producing the output voltage comprising

a second inductor;

a third transistor to provide h first intermediate voltage to the second inductor when switched on;

a fourth transistor to provide the second intermediate voltage to the second inductor when switched on; and

a control circuit to control the duty cycles of the third and fourth transistors hold the output voltage within a desired range.

10. The circuit of claim 9 in which a difference between the first intermediate voltage and the second intermediate voltage is less than the output voltage.

11. The circuit of claim 9 in which the generating means operates at a first frequency and in which the producing means operates at a second frequency higher than the first frequency.

12. The circuit of claim 11 in which the first frequency is less than one one-hundredth of the second frequency.

13. The circuit of claim 9 incorporated into a device selected from a group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, and a computer.

14. The circuit of claim 9 , in which the circuit is integrated into a semiconductor die.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2010
From: CAROBOLANTE, FRANCESCO; PRODIC, ALEKSANDAR
To: QUALCOMM INCORPORATED
Reel/Frame 025523/0797 →
Continuity (1)
Related Publication 20120153907A1 · Jun 21, 2012