Nonvolatile semiconductor memory device and method for manufacturing same

1. A nonvolatile semiconductor memory device comprising:

a first stacked structure including a plurality of first electrode films stacked in a first direction and a first interelectrode insulating film provided between the plurality of first electrode films;

a first select gate electrode stacked with the first stacked structure along the first direction, the first select gate electrode including a plurality of first select gate conductive films stacked in the first direction and a first inter-select gate conductive film insulating film provided between the plurality of first select gate conductive films;

a first semiconductor pillar piercing the first stacked structure, the plurality of first select gate conductive films and the first inter-select gate conductive film insulating film in the first direction;

a first memory layer provided between the plurality of first electrode films and the first semiconductor pillar;

a first inner insulating film provided between the first memory layer and the first semiconductor pillar;

a first outer insulating film provided between the first memory layer and the plurality of first electrode films; and

a first select gate insulating film provided between the plurality of first select gate conductive films and the first semiconductor pillar.

2. The device according to claim 1 , wherein each of the plurality of first select gate conductive films is made of a material identical to a material of each of the plurality of first electrode films.

3. The device according to claim 1 , wherein each of the plurality of first select gate conductive films has a thickness identical to a thickness of each of the plurality of first electrode films.

4. The device according to claim 1 , further comprising:

a second stacked structure being adjacent to the first stacked structure in a second direction perpendicular to the first direction, the second stacked structure including a plurality of second electrode films stacked in the first direction and a second interelectrode insulating film provided between the plurality of second electrode films;

a second select gate electrode stacked with the second stacked structure along the first direction, the second select gate electrode including a plurality of second select gate conductive films stacked in the first direction and a second inter-select gate conductive film insulating film provided between the plurality of second select gate conductive films;

a second semiconductor pillar piercing the second stacked structure and the second select gate electrode in the first direction;

a second memory layer provided between the plurality of second electrode films and the second semiconductor pillar;

a second inner insulating film provided between the second memory layer and the second semiconductor pillar;

a second outer insulating film provided between the second memory layer and the plurality of second electrode films;

a second select gate insulating film provided between the plurality of second select gate conductive films and the second semiconductor pillar; and

a semiconductor connecting portion connecting one end of the first semiconductor pillar and one end of the second semiconductor pillar.

5. The device according to claim 4 , further comprising:

a first interconnection connected to another end of the first semiconductor pillar on opposite side from the semiconductor connecting portion; and

a second interconnection connected to another end of the second semiconductor pillar on opposite side from the semiconductor connecting portion and extending in a direction orthogonal to extending direction of the first interconnection.

6. The device according to claim 4 , wherein

each of the plurality of second select gate conductive films has a thickness identical to a thickness of each of the plurality of first select gate conductive films, and

each of the plurality of second inter-select gate conductive film insulating films has a thickness identical to a thickness of each of the plurality of first inter-select gate conductive film insulating films.

7. The device according to claim 1 , wherein the first inter-select gate conductive film insulating film is made of a material identical to a material of the first interelectrode insulating film.

8. The device according to claim 1 , wherein the first inter-select gate conductive film insulating film has a thickness identical to a thickness of the first interelectrode insulating film.

9. The device according to claim 1 , wherein the first select gate electrode has a thickness along the first direction larger than a thickness along the first direction of one of the plurality of first electrode films.

10. The device according to claim 1 , wherein a number of the plurality of first electrode films is larger than a number of the plurality of first select gate conductive films.

11. The device according to claim 1 , wherein the first electrode film includes at least one of polycrystalline silicon doped with impurity and amorphous silicon doped with impurity.

12. The device according to claim 1 , wherein the first select gate conductive film includes at least one of amorphous silicon doped with impurity and polycrystalline silicon doped with impurity.

13. The device according to claim 1 , wherein the first memory layer includes silicon nitride.

14. The device according to claim 1 , wherein the first inner insulating film includes silicon oxide.

15. The device according to claim 1 , wherein the first outer insulating film includes silicon oxide.

16. The device according to claim 1 , wherein the first inter-select gate conductive film insulating film includes silicon oxide.