IP Library Granted Patent US 8,588,289
Granted Patent B2
US 8,588,289 · App. 13/183,932 · Granted Nov 19, 2013

Adaptive signal equalizer with segmented coarse and fine controls

Inventors: Amit Rane (Santa Clara, CA); Nicolas Nodenot (Villeneuve-Loubet, FR); Yongseon Koh (Palo Alto, CA); Laurence D. Lewicki (Menlo Park, CA); Benjamin Buchanan (Suwanee, GA)
Assignee: National Semiconductor Corporation
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Quick Facts
Patent No.
US 8,588,289
App. No.
13/183,932
Granted
Nov 19, 2013
Kind
B2
Abstract

Circuitry for adaptive signal equalizing with coarse and fine boost controls by providing multiple serially coupled stages of parallel controllable DC and AC signal gains with coarse and fine gain controls provided across all stages.

Claims (30)

1. An apparatus including circuitry for adaptive signal equalizing with coarse and fine boost controls, comprising:

differential amplifier circuitry responsive, in accordance with a variable signal gain, to at least one controlled supply current and a differential input signal by providing a differential output signal;

current source circuitry coupled to said differential amplifier circuitry and responsive to at least a first control signal by providing said at least one controlled supply current;

a variable impedance coupled to said differential amplifier circuitry and responsive to at least a second control signal by establishing said variable signal gain;

wherein said variable impedance comprises a tunable impedance and a fixed impedance mutually coupled;

wherein said tunable impedance and fixed impedance are mutually coupled in parallel;

wherein said tunable impedance comprises a capacitance and at least one transistor mutually coupled;

wherein said capacitance and at least one transistor are mutually coupled in series; and

wherein said fixed impedance comprises a resistance.

2. The apparatus of claim 1 , wherein said differential amplifier circuitry comprises first and second transistors coupled to receive respective phases of said differential input signal and provide respective phases of said differential output signal.

3. The apparatus of claim 1 , wherein said current source circuitry comprises first and second current source circuits coupled to provide respective portions of said at least one controlled supply current in accordance with said at least a first control signal.

4. An apparatus including circuitry for adaptive signal equalizing with coarse and fine boost controls, comprising:

first differential amplifier circuitry responsive to at least a first controlled supply current and a differential input signal by providing a first portion of a differential output signal;

first current source circuitry coupled to said first differential amplifier circuitry and responsive to at least a first control signal by providing said at least a first controlled supply current;

second differential amplifier circuitry coupled to said first differential amplifier circuitry and responsive, in accordance with a variable signal gain, to at least a second controlled supply current and said differential input signal by providing a second portion of said differential output signal;

second current source circuitry coupled to said second differential amplifier circuitry and responsive to at least a second control signal by providing said at least a second controlled supply current;

a variable impedance coupled to said second differential amplifier circuitry and responsive to at least a third control signal by establishing said variable signal gain;

wherein said variable impedance comprises a tunable impedance and a fixed impedance mutually coupled;

wherein said tunable impedance and fixed impedance are mutually coupled in parallel;

wherein said tunable impedance comprises a capacitance and at least one transistor mutually coupled;

wherein said capacitance and at least one transistor are mutually coupled in series; and

wherein said fixed impedance comprises a resistance.

5. The apparatus of claim 4 , wherein said first and second control signals include substantially mutually exclusive signal assertion states.

6. The apparatus of claim 4 , wherein said first differential amplifier circuitry comprises:

first and second transistors coupled to receive respective phases of said differential input signal and provide respective phases of said first portion of said differential output signal; and

a fixed impedance coupled between said first and second transistors.

7. The apparatus of claim 6 , wherein said fixed impedance comprises a resistance.

8. The apparatus of claim 4 , wherein said first current source circuitry comprises first and second current source circuits coupled to provide respective portions of said at least a first controlled supply current in accordance with said at least a first control signal.

9. The apparatus of claim 4 , wherein said second differential amplifier circuitry comprises first and second transistors coupled to receive respective phases of said differential input signal and provide respective phases of said second portion of said differential output signal.

10. The apparatus of claim 4 , wherein said second current source circuitry comprises first and second current source circuits coupled to provide respective portions of said at least a second controlled supply current in accordance with said at least a second control signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 2, 2011
From: RANE, AMIT; NODENOT, NICOLAS; KOH, YONGSEON; LEWICKI, LAURENCE D.; BUCHANAN, BENJAMIN
To: NATIONAL SEMICONDUCTOR CORPORATION
Reel/Frame 026850/0270 →
Continuity (2)
Provisional Application 61365531 · Jul 19, 2010
Related Publication 20120188014A1 · Jul 26, 2012