Operational system test method
The present invention features an operational system test method, comprising defining a fault model, inserting a test agent, hooking a test location, collecting test information, and removing the test agent. The invention also features an operational system test method, comprising defining a fault model, inserting a test agent, identifying a memory area according to a test location, hooking the identified memory area, collecting test information, and removing the test agent.
1. An operational system test method, comprising:
defining a fault model;
inserting a test agent based on program context information of process control block (PCB);
hooking a test location by hooking the PCB of operating system (OS), when the inserted test agent passes by a place defined as the test location;
collecting test information; and
removing the test agent.
2. The method of claim 1 , wherein defining a fault model comprises:
defining the test location according to a fault type;
defining the test information according to the fault type; and
generating a test code for collecting the test information.
3. The method of claim 2 , wherein inserting a test agent comprises:
configuring a list for a process which is operating; and
inserting the test agent based on the list.
4. The method of claim 3 , wherein hooking a test location comprises:
identifying a memory area according to the test location; and
hooking the identified memory area with the test code.
5. The method of claim 4 , wherein collecting test information comprises collecting program execution information, process context information and system status information.
6. The method of claim 5 , wherein removing the test agent comprises:
restoring the test location; and
removing the test agent.
7. An operational system test method, comprising:
defining a fault model;
inserting a test agent based on program context information from a process control block (PCB);
identifying a memory area according to a test location;
hooking the identified memory area by hooking the PCB of an operating system, when the inserted test agent passes by a place defined as the test location;
collecting test information; and
removing the test agent.
8. The method of claim 7 , wherein defining a fault model comprises:
defining the test location according to a fault type;
defining the test information according to the fault type; and
generating a test code for collecting the test information.
9. The method of claim 8 , wherein hooking the identified memory area comprises hooking the identified memory area of the PCB with the test code.
10. The method of claim 9 , wherein the identified memory area comprises a function table.
11. The method of claim 10 , wherein the function table comprises an APISet area and an Import Address Table (IAT).
12. The method of claim 9 , wherein the identified memory area comprises a code space area of the PCB.
13. The method of claim 9 , wherein the test information comprises a program execution information of the PCB and a process context information of the PCB.