IP Library Granted Patent US 8,664,118
Granted Patent B2
US 8,664,118 · App. 13/539,907 · Granted Mar 4, 2014

Semiconductor device and method for manufacturing the same

Inventors: Akihiro Ishizuka (Sagamihara, JP); Kazuya Hanaoka (Fujisawa, JP); Shinya Sasagawa (Chigasaki, JP); Sho Nagamatsu (Isehara, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,664,118
App. No.
13/539,907
Granted
Mar 4, 2014
Kind
B2
Abstract

An object is to provide a semiconductor device having excellent characteristics, in which a channel layer includes an oxide semiconductor with high crystallinity. In addition, a semiconductor device including a base film with improved planarity is provided. CMP treatment is performed on the base film of the transistor and plasma treatment is performed thereon after the CMP treatment, whereby the base film can have a center line average roughness Ra 75 of less than 0.1 nm. The oxide semiconductor layer with high crystallinity is formed over the base film having planarity, which is obtained by the combination of the plasma treatment and the CMP treatment, thereby improving the characteristics of the semiconductor device.

Claims (26)

1. A method for manufacturing a semiconductor device, comprising the steps of:

forming a base film over a substrate;

performing chemical mechanical polishing treatment on the base film;

performing plasma treatment on the base film after the chemical mechanical polishing treatment; and

forming an oxide semiconductor layer over a planar surface which is obtained by the plasma treatment and the chemical mechanical polishing treatment.

2. The method for manufacturing a semiconductor device according to claim 1 , wherein the plasma treatment is plasma treatment using a rare gas.

3. The method for manufacturing a semiconductor device according to claim 1 , wherein the substrate is a semiconductor substrate.

4. The method for manufacturing a semiconductor device according to claim 1 , wherein the substrate is a glass substrate.

5. The method for manufacturing a semiconductor device according to claim 1 , wherein the plasma treatment is performed with an inductively coupled plasma etching apparatus.

6. The method for manufacturing a semiconductor device according to claim 1 , wherein the oxide semiconductor layer comprises In—Ga—Zn—O-based oxide semiconductor.

7. The method for manufacturing a semiconductor device according to claim 1 , wherein the oxide semiconductor layer includes a crystal having a c-axis alignment.

8. The method for manufacturing a semiconductor device according to claim 1 , wherein the center line average roughness Ra 75 of the surface of the base film is less than or equal to 0.1 nm.

9. A method for manufacturing a semiconductor device, comprising the steps of:

forming a base film over a substrate;

performing first plasma treatment on the base film;

performing chemical mechanical polishing treatment on the base film after the first plasma treatment;

performing second plasma treatment on the base film after the chemical mechanical polishing treatment; and

forming an oxide semiconductor layer over a planar surface which is obtained by the first plasma treatment, the chemical mechanical polishing treatment, and the second plasma treatment.

10. The method for manufacturing a semiconductor device according to claim 9 , wherein the first plasma treatment and the second plasma treatment are each plasma treatment using a rare gas.

11. The method for manufacturing a semiconductor device according to claim 9 , wherein the base film is any of a silicon oxide film, a gallium oxide film, a hafnium oxide film, and an aluminum oxide film.

12. The method for manufacturing a semiconductor device according to claim 9 , wherein the substrate is a semiconductor substrate.

13. The method for manufacturing a semiconductor device according to claim 9 , wherein the substrate is a glass substrate.

14. The method for manufacturing a semiconductor device according to claim 9 , wherein the plasma treatment is performed with an inductively coupled plasma etching apparatus.

15. The method for manufacturing a semiconductor device according to claim 9 , wherein the oxide semiconductor layer comprises In—Ga—Zn—O-based oxide semiconductor.

16. The method for manufacturing a semiconductor device according to claim 9 , wherein the oxide semiconductor layer includes a crystal having a c-axis alignment.

17. The method for manufacturing a semiconductor device according to claim 9 , wherein the center line average roughness Ra 75 of the surface of the base film is less than or equal to 0.1 nm.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2012
From: ISHIZUKA, AKIHIRO; HANAOKA, KAZUYA; SASAGAWA, SHINYA; NAGAMATSU, SHO
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 028478/0146 →
Priority Claims (1)
JP 2011-152001 · Jul 8, 2011 · national
Continuity (1)
Related Publication 20130011961A1 · Jan 10, 2013