IP Library Granted Patent US 8,677,218
Granted Patent B2
US 8,677,218 · App. 12/953,348 · Granted Mar 18, 2014

LDPC decoding with on the fly error recovery

Inventors: Lingqi Zeng (San Jose, CA); Yu Kou (San Jose, CA)
Assignee: SK hynix memory solutions inc.
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Quick Facts
Patent No.
US 8,677,218
App. No.
12/953,348
Granted
Mar 18, 2014
Kind
B2
Abstract

It is decided whether to adjust data associated with a decoder. In the event it is decided to adjust the data associated with the decoder, the data is adjusted to obtain adjusted data and decoding is performed using the decoder and the adjusted data. In the event it is decided to not adjust the data associated with the decoder, decoding is performed using the decoder and the data associated with the decoder.

Claims (64)

1. A method, comprising:

deciding whether to adjust data associated with a decoder, wherein:

deciding whether to adjust the data associated with the decoder includes one or more of the following: using a schedule, using a defect detector configured to detect defects using a finite impulse response (FIR) signal, or using a set of one or more programmable registers; and

the defect detector is configured to detect deep defects based at least in part on one or more of the following: a run of 0's, a run of 1's or a Nyquist pattern;

in the event it is decided to adjust the data associated with the decoder:

adjusting the data to obtain adjusted data, including by:

sorting, based on length, a list which includes any detected runs of 0's, any detected runs of 1's and any detected Nyquist patterns;

during a first iteration:

(1) adjusting data corresponding to that defect in the sorted list having the longest length; and

(2) not adjusting data corresponding to all other defects, if any, in the sorted list; and

during a second iteration subsequent to the first iteration:

(1) adjusting data corresponding to those defects in the sorted list having the longest length and the second longest length; and

(2) not adjusting data corresponding to all other defects, if any, in the sorted list; and

performing decoding using the decoder and the adjusted data; and

in the event it is decided to not adjust the data associated with the decoder, performing decoding using the decoder and the data associated with the decoder.

2. The method of claim 1 , further comprising buffering a finite impulse response (FIR) signal, wherein adjusting the data, performing decoding using the adjusted data and performing decoding using the data associated with the decoder include using the buffered FIR signal.

3. The method of claim 1 , wherein the decoder includes a soft output Viterbi decoder and the data associated with the decoder includes a finite impulse response (FIR) signal.

4. The method of claim 1 , wherein the decoder includes a low-density parity-check (LDPC) decoder and the data associated with the decoder includes a log likelihood ratio (LLR) signal output by a soft output Viterbi decoder.

5. The method of claim 1 , wherein the decoder includes a soft output Viterbi decoder and the data associated with the decoder includes one or more parameters associated with the soft output Viterbi decoder.

6. The method of claim 1 , wherein the decoder includes a soft output Viterbi decoder and the data associated with the decoder includes a log likelihood ratio (LLR) signal output by a low-density parity-check (LDPC) decoder.

7. The method of claim 1 , wherein the defect detector is further configured to detect defects associated with an amplitude defect.

8. The method of claim 1 , wherein adjusting the data includes one or more of the following: preserving a sign and reducing a magnitude or zeroing out a value.

9. A system, comprising:

a controller configured to decide whether to adjust data associated with a decoder, wherein:

the controller is configured to decide whether to adjust the data associated with the decoder using one or more of the following: using a schedule, using a defect detector configured to detect defects using a finite impulse response (FIR) signal, or using a set of one or more programmable registers; and

the defect detector is configured to detect deep defects based at least in part on one or more of the following: a run of 0's, a run of 1's or a Nyquist pattern;

a signal processor configured to in the event it is decided to adjust the data associated with the decoder, adjust the data to obtain adjusted data, including by:

sorting, based on length, a list which includes any detected runs of 0's, any detected runs of 1's and any detected Nyquist patterns;

during a first iteration:

(1) adjusting data corresponding to that defect in the sorted list having the longest length; and

(2) not adjusting data corresponding to all other defects, if any, in the sorted list; and

during a second iteration subsequent to the first iteration:

(1) adjusting data corresponding to those defects in the sorted list having the longest length and the second longest length; and

(2) not adjusting data corresponding to all other defects, if any, in the sorted list; and

a decoder configured to:

in the event it is decided to adjust the data associated with the decoder, perform decoding using the adjusted data; and

in the event it is decided to not adjust the data associated with the decoder, performing decoding using the data associated with the decoder.

10. The system of claim 9 , further comprising a buffer configured to buffer a finite impulse response (FIR) signal, wherein the signal processor is configured to adjust the data and the decoder is configured to perform decoding using the adjusted data and perform decoding using the data associated with the decoder by using the buffered FIR signal.

11. The system of claim 9 , wherein the decoder includes a soft output Viterbi decoder and the data associated with the decoder includes a finite impulse response (FIR) signal.

12. The system of claim 9 , wherein the decoder includes a low-density parity-check (LDPC) decoder and the data associated with the decoder includes a log likelihood ratio (LLR) signal output by a soft output Viterbi decoder.

13. The system of claim 9 , wherein the decoder includes a soft output Viterbi decoder and the data associated with the decoder includes one or more parameters associated with the soft output Viterbi decoder.

14. The system of claim 9 , wherein the decoder includes a soft output Viterbi decoder and the data associated with the decoder includes a log likelihood ratio (LLR) signal output by a low-density parity-check (LDPC) decoder.

15. The system of claim 9 , wherein the defect detector is further configured to detect defects associated with an amplitude defect.

16. The system of claim 9 , wherein the signal processor is configured to adjust the data by one or more of the following: preserving a sign and reducing a magnitude or zeroing out a value.

17. A computer program product, the computer program product being embodied in a non-transitory computer readable storage medium and comprising computer instructions for:

deciding whether to adjust data associated with a decoder, wherein:

deciding whether to adjust the data associated with the decoder includes one or more of the following: using a schedule, using a defect detector configured to detect defects using a finite impulse response (FIR) signal, or using a set of one or more programmable registers; and

the defect detector is configured to detect deep defects based at least in part on one or more of the following: a run of 0's, a run of 1's or a Nyquist pattern;

in the event it is decided to adjust the data associated with the decoder:

adjusting the data to obtain adjusted data, including by:

sorting, based on length, a list which includes any detected runs of 0's, any detected runs of 1's and any detected Nyquist patterns;

during a first iteration:

(1) adjusting data corresponding to that defect in the sorted list having the longest length; and

(2) not adjusting data corresponding to all other defects, if any, in the sorted list; and

during a second iteration subsequent to the first iteration:

(1) adjusting data corresponding to those defects in the sorted list having the longest length and the second longest length; and

(2) not adjusting data corresponding to all other defects, if any, in the sorted list; and

performing decoding using the decoder and the adjusted data; and

in the event it is decided to not adjust the data associated with the decoder, performing decoding using the decoder and the data associated with the decoder.

18. The computer program product of claim 17 , wherein the decoder includes a soft output Viterbi decoder and the data associated with the decoder includes a finite impulse response (FIR) signal.

19. The computer program product of claim 17 , wherein the decoder includes a low-density parity-check (LDPC) decoder and the data associated with the decoder includes a log likelihood ratio (LLR) signal output by a soft output Viterbi decoder.

20. The computer program product of claim 17 , wherein the decoder includes a soft output Viterbi decoder and the data associated with the decoder includes one or more parameters associated with the soft output Viterbi decoder.

21. The computer program product of claim 17 , wherein the decoder includes a soft output Viterbi decoder and the data associated with the decoder includes a log likelihood ratio (LLR) signal output by a low-density parity-check (LDPC) decoder.

22. The computer program product of claim 17 , wherein the computer instructions for adjusting the data include computer instructions for one or more of the following: preserving a sign and reducing a magnitude or zeroing out a value.

Assignments (2)
CHANGE OF NAME Recorded Feb 25, 2013
From: LINK_A_MEDIA DEVICES CORPORATION
To: SK HYNIX MEMORY SOLUTIONS INC.
Reel/Frame 029872/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 25, 2011
From: ZENG, LINGQI; KOU, YU
To: LINK_A_MEDIA DEVICES CORPORATION
Reel/Frame 025696/0317 →
Continuity (3)
Provisional Application 61336931 · Jan 27, 2010
Provisional Application 61337286 · Feb 1, 2010
Related Publication 20110185264A1 · Jul 28, 2011