Method of making a FinFET device
A FinFET device is fabricated by first receiving a FinFET precursor. The FinFET precursor includes a substrate and fin structures on the substrate. A sidewall spacer is formed along sidewall of fin structures in the precursor. A portion of fin structure is recessed to form a recessing trench with the sidewall spacer as its upper portion. A semiconductor is epitaxially grown in the recessing trench and continually grown above the recessing trench to form an epitaxial structure.
1. A method for fabricating a fin field-effect transistor (FinFET) device, the method comprising:
receiving a FinFET precursor, the FinFET precursor including:
a substrate; and
fin structures with a spacing distance (S) to each other on the substrate;
forming sidewall spacers with a predetermined spacer height (Hs) along sidewalls of the fin structures;
recessing the fin structures to form recessing trenches, wherein the sidewall spacers are upper portions of the recessing trenches; and
forming an epitaxial structures above the recessing trenches with a height (H) and a width (W).
2. The method of claim 1 , wherein the spacer height (Hs) is tunable by a spacer etching process.
3. The method of claim 1 , wherein the epitaxial structures are formed by epitaxially growing a semiconductor material on the recessed fins in the recessing trenches, the epitaxial growth extending above the recessing trenches to form the epitaxial structures.
4. The method of claim 1 , wherein the epitaxial structures are formed by multiple deposition processes with different semiconductor materials for each deposition process.
5. The method of claim 1 , wherein W is tunable by Hs with a fixed S.
6. The method of claim 1 , wherein H is tunable by Hs with a fixed S.
7. The method of claim 1 , wherein a merging spacing (M) between two adjacent epitaxial structures is tunable by Hs with a fixed S.
8. The method of claim 1 , wherein the epitaxial structures include a source/drain structure.
9. The method of claim 1 , further comprising:
after forming the epitaxial structure, removing the sidewall spacers by a selective etching process.
10. A method for fabricating a fin field-effect transistor (FinFET) device, the method comprising:
receiving a FinFET precursor that includes:
a substrate;
a fin structure on the substrate, the fin structure including fins spaced from each other a spacing distance (S);
isolation regions separating the fins; and
a gate stack on the substrate;
forming sidewall spacers with a predetermined spacer height (Hs) along a fin of the fin structure and the gate stack;
removing a portion of the fin to form a recessing trench, wherein the sidewall spacers define an upper portion of the recessing trench;
epitaxially growing a semiconductor material on the recessed fin in the recessing trench; and
continually growing the semiconductor material to extend above the recessing trench to form an epitaxial structure.
11. The method of claim 10 , wherein Hs is controlled by a spacer etching process.
12. The method of claim 1 , wherein the epitaxial structure is formed with a width (W) such that is tunable by the Hs.
13. The method of claim 10 , wherein the epitaxial structure is formed with a height (H) such that is tunable by Hs.
14. The method of claim 10 , wherein the adjacent epitaxial structure is formed with a merging spacing (M) such that is tunable by Hs.
15. The method of claim 10 , wherein the shape of the epitaxial structure has at least one facet of a crystal plane orientation.
16. The method of claim 15 , wherein the crystal plane orientation is a (111) crystallographic orientation.
17. The method of claim 16 , wherein the epitaxial structure has four facets and the four facets have the (111) crystallographic orientation.
18. The method of claim 10 , wherein the epitaxial structure includes a source/drain structure.
19. The method of claim 10 , wherein the epitaxial structure is formed by different semiconductor materials by performing multiple epitaxially growing processes.
20. A method for fabricating a fin field-effect transistor (FinFET) device, the method comprising:
receiving a FinFET precursor that includes:
a substrate;
a fin structure on the substrate, the fin structure including fins spaced from each other a spacing distance (S);
isolation regions separating the fins; and
a gate stack on the substrate;
forming sidewall spacers with a predetermined spacer height (Hs) along the fins and the gate stack;
removing a portion of the fins to form recessing trenches, wherein each of the recessing trenches includes the sidewall spacers as an upper portion; and
forming an epitaxial source/drain structures above the recessing trenches, wherein a width and a height of the epitaxial source/drain structures are tunable by Hs, wherein a merging spacing between two adjacent epitaxial source/drain structures is tunable by Hs.