IP Library Granted Patent US 8,704,273
Granted Patent B2
US 8,704,273 · App. 12/793,160 · Granted Apr 22, 2014

Semiconductor device and method for manufacturing the same, and amplifier

Inventors: Naoya Okamoto (Kawasaki, JP); Atsushi Yamada (Kawasaki, JP)
Assignee: Fujitsu Limited
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Quick Facts
Patent No.
US 8,704,273
App. No.
12/793,160
Granted
Apr 22, 2014
Kind
B2
Abstract

A semiconductor device includes a nitride semiconductor layer having a (0001) face and a (000-1) face, formed above a common substrate; a (0001) face forming layer provided partially between the substrate and the nitride semiconductor layer; a source electrode, a drain electrode, and a gate electrode, provided on the nitride semiconductor layer having the (0001) face; and a hole extracting electrode provided on the nitride semiconductor layer having the (000-1) face.

Claims (54)

1. A semiconductor device comprising:

a plurality of transistor regions formed over a common substrate and being isolated from each other by an isolation region;

each of the plurality of transistor regions including:

a nitride semiconductor layer having a (0001) face and a (000-1) face;

a (0001) face forming layer provided partially between the substrate and the nitride semiconductor layer;

a source electrode, a drain electrode, and a gate electrode, provided on the nitride semiconductor layer having the (0001) face; and

a hole extracting electrode provided on the nitride semiconductor layer having the (000-1) face.

2. The semiconductor device according to claim 1 , wherein the nitride semiconductor layer comprises a first nitride semiconductor layer having a (0001) face and a (000-1) face and a second nitride semiconductor layer contacting the bottom of the first nitride semiconductor layer and having a (0001) face and a (000-1) face,

the source electrode, the drain electrode, and the gate electrode are provided on the first nitride semiconductor layer having the (0001) face,

the hole extracting electrode is provided on the first nitride semiconductor layer having the (000-1) face.

3. The semiconductor device according to claim 2 , wherein the hole extracting electrode extends from the surface of the first nitride semiconductor layer to a depth deeper than an interface between the first nitride semiconductor layer and the second nitride semiconductor layer.

4. The semiconductor device according to claim 1 , wherein the nitride semiconductor layer comprises a first nitride semiconductor layer having a (0001) face and a (000-1) face and a third nitride semiconductor layer contacting the top of the first nitride semiconductor layer and having a (0001) face and a (000 -1) face,

the source electrode and the drain electrode are provided on the first nitride semiconductor layer having the (0001) face,

the hole extracting electrode is provided on the first nitride semiconductor layer having the (000-1) face,

the gate electrode is provided on the third nitride semiconductor layer having the (0001) face.

5. The semiconductor device according to claim 1 , further comprising:

a via hole; and

a via interconnection provided in the via hole and connected to the hole extracting electrode.

6. The semiconductor device according to claim 1 , further comprising:

a via hole; and

a via interconnection provided in the via hole and connected to the hole extracting electrode,

wherein the hole extracting electrode extends from the surface of the first nitride semiconductor layer to a depth deeper than an interface between the first nitride semiconductor layer and the second nitride semiconductor layer, and

the via hole is formed through the hole extracting electrode so as to extend from the front surface side of the first nitride semiconductor layer to the back surface side of the substrate.

7. The semiconductor device according to claim 1 , wherein the substrate is a substrate selected from the group consisting of a sapphire substrate, a silicon carbide substrate, a gallium nitride substrate, and an aluminum nitride substrate.

8. The semiconductor device according to claim 1 , wherein the substrate is a C-face sapphire substrate, and

the (0001) face forming layer is an AlN layer.

9. The semiconductor device according to claim 1 , further comprising a fourth nitride semiconductor layer formed entirely above the substrate and having a (000-1) face,

wherein the (0001) face forming layer is a Mg layer formed partially on the fourth nitride semiconductor layer.

10. The semiconductor device according to claim 1 , the hole extracting electrode is formed from a metal having a work function of 5 eV or greater.

11. The semiconductor device according to claim 1 , wherein the gate electrode and the hole extracting electrode are made from the same material.

12. The semiconductor device according to claim 1 , the nitride semiconductor layer is an AlGaN layer having an aluminum composition of 25% or higher.

13. The semiconductor device according to claim 1 , wherein the hole extracting electrode is formed in a recess provided on the nitride semiconductor layer having the (000-1) face.

14. The semiconductor device according to claim 1 , wherein the gate electrode is formed in a recess provided on the nitride semiconductor layer having the (0001) face.

15. An amplifier comprising:

a semiconductor device including:

a plurality of transistor regions formed over a common substrate and being isolated from each other by an isolation region;

each of the plurality of transistor regions including:

a nitride semiconductor layer having a (0001) face and a (000-1) face;

a (0001) face forming layer provided partially between the substrate and the nitride semiconductor layer;

a source electrode, a drain electrode, and a gate electrode, provided on the nitride semiconductor layer having the (0001) face; and

a hole extracting electrode provided on the nitride semiconductor layer having the (000-1) face.

16. A method for manufacturing a semiconductor device, comprising:

forming a (0001) face forming layer partially above a substrate;

forming a nitride semiconductor layer having a (0001) face and a (000-1) face, above the substrate and the (0001) face forming layer;

forming a source electrode, a drain electrode, and a gate electrode, on the nitride semiconductor layer having the (0001) face, and forming a hole extracting electrode on the nitride semiconductor layer having the (000-1) face; and

forming an isolation region such that a plurality of transistor regions are formed, each of the plurality of transistor regions including the nitride semiconductor layer having the (0001) face and the (000-1) face.

17. The method for forming a semiconductor device according to claim 16 , wherein the substrate is a C-face sapphire substrate, and

the (0001) face forming layer is an AlN layer.

18. The method for forming a semiconductor device according to claim 16 , further comprising:

forming another nitride semiconductor layer having a (000-1) face entirely above the substrate; and

forming partially, on the another nitride semiconductor layer, a Mg layer as the (0001) face forming layer.

19. The method for forming a semiconductor device according to claim 16 , further comprising:

forming the source electrode and the drain electrode simultaneously on the nitride semiconductor layer having the (0001) face; and

forming the gate electrode on the nitride semiconductor layer having the (0001) face, and the hole extracting electrode on the nitride semiconductor layer having the (000-1) face, simultaneously, from a metal having a work function of 5 eV or greater.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 18, 2010
From: OKAMOTO, NAOYA; YAMADA, ATSUSHI
To: FUJITSU LIMITED
Reel/Frame 024558/0160 →
Priority Claims (1)
JP 2009-144323 · Jun 17, 2009 · national
Continuity (1)
Related Publication 20100320505A1 · Dec 23, 2010