IP Library Granted Patent US 8,718,126
Granted Patent B2
US 8,718,126 · App. 12/984,788 · Granted May 6, 2014

Adaptive equalizer and adaptive equalizing method

Inventor: Tszshing Cheung (Kawasaki, JP)
Assignee: Fujitsu Limited
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Quick Facts
Patent No.
US 8,718,126
App. No.
12/984,788
Granted
May 6, 2014
Kind
B2
Abstract

An adaptive equalizer includes an equalization circuit and an operation number change unit. The equalization circuit includes a plurality of cascade-coupled delay taps. The equalization circuit equalizes an input signal by adding calculation results of the plurality of delay taps. The operation number change unit changes a number of operations of the plurality of delay taps according to an equalization error of the equalization circuit.

Claims (27)

1. An adaptive equalizer comprising:

an equalization circuit, which includes a plurality of delay taps which are cascade-coupled, to equalize an input signal by adding up calculation results of the plurality of delay taps; and

an operation number change circuit to change a number of operations of the plurality of delay taps according to an equalization error of the equalization circuit,

wherein the operation number change circuit reduces the number of operations of the delay tap until a reduction amount of the equalization error, which is obtained when the number of operations of the delay tap is reduced, becomes equal to or less than a prescribed value.

2. The adaptive equalizer according to claim 1 , further comprising:

an equalization error generator to generate the equalization error of the equalization circuit.

3. The adaptive equalizer according to claim 2 , wherein the equalization error generator includes an identification circuit and a subtraction circuit.

4. The adaptive equalizer according to claim 1 , wherein the operation number change circuit reduces the number of operations by stopping a power supply to the plurality of delay taps, respectively.

5. The adaptive equalizer according to claim 4 , wherein to reduce the number of operations of the plurality of delay taps, the operation number change circuit stops the power supply to the delay tap at a final stage among the delay taps during operation.

6. The adaptive equalizer according to claim 1 , wherein the operation number change circuit reduces the number of operations of the delay tap when the equalization error is equal to or less than a prescribed value.

7. The adaptive equalizer according to claim 1 , wherein when a calculation coefficient of any delay tap is equal to or less than a prescribed value, the operation number change circuit stops the power supply to the delay tap.

8. The adaptive equalizer according to claim 1 , wherein the equalization error is an average error of an output which is output from the equalization circuit.

9. The adaptive equalizer according to claim 8 , wherein the average error is an average value of a difference between the output from the equalization circuit and decoding data obtained by identifying the output from the equalization.

10. The adaptive equalizer according to claim 1 , wherein the equalization circuit includes at least any one of a Feed Forward Equalization (FFE) filter, a Decision Feedback Equalization (DFE) filter, and an Infinite Impulse Response (IIR) filter.

11. The adaptive equalizer according to claim 1 , further comprising:

a coefficient setting circuit to enhance a calculation coefficient of the delay tap,

wherein the coefficient setting circuit sets the calculation coefficient of the delay tap so that the equalization error of the equalization circuit is reduced.

12. The adaptive equalizer according to claim 1 , wherein the delay tap performs feedback control of the calculation coefficient of the delay tap by a least-mean-square method.

13. An adaptive equalizing method comprising:

equalizing an input signal by adding a calculation result with respect to the input signal of a plurality of delay taps which are cascade-coupled; and

changing a number of operations of the plurality of delay taps according to an equalization error that occurs when the input signal is equalized,

wherein the reducing the number of operations of the delay tap until a reduction amount of the equalization error, which is obtained when the number of operations of the delay tap is reduced, becomes equal to or less than a prescribed value.

14. The adaptive equalizing method according to claim 13 , wherein reducing the number of operations by stopping a power supply to the plurality of delay taps, respectively.

15. The adaptive equalizing method according to claim 14 , wherein reducing the number of operations of the plurality of delay taps by stopping the power supply to the delay tap at a final stage among the delay taps during operation.

16. The adaptive equalizing method according to claim 13 , wherein reducing the number of operations of the delay tap when the equalization error is equal to or less than a prescribed value.

17. The adaptive equalizing method according to claim 13 , wherein stopping the power supply to the delay tap when the calculation coefficient of any delay tap is equal to or less than a prescribed value.

18. The adaptive equalizing method according to claim 13 , wherein the equalization error is an average error of an output.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 30, 2011
From: CHEUNG, TSZSHING
To: FUJITSU LIMITED
Reel/Frame 025718/0381 →
Priority Claims (1)
JP 2010-13601 · Jan 25, 2010 · national
Continuity (1)
Related Publication 20110182347A1 · Jul 28, 2011