IP Library Granted Patent US 8,725,893
Granted Patent B2
US 8,725,893 · App. 13/083,952 · Granted May 13, 2014

Method and system for configuring a plurality of network interfaces that share a physical interface

Inventors: Eliezer Tamir (Beit Shemesh, IL); Uri Tal (Netanya, IL); Shay Mizrachi (Hod HaSharon, IL)
Assignee: Broadcom Corporation
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,725,893
App. No.
13/083,952
Granted
May 13, 2014
Kind
B2
Abstract

Certain aspects of a method and system for configuring a plurality of network interfaces that share a physical interface (PHY) may include a system comprising one or more physical network interface controllers (NICs) and two or more virtual NICs. One or more drivers associated with each of the virtual NICs that share one or more Ethernet ports associated with the physical NICs may be synchronized based on controlling one or more parameters associated with one or more Ethernet ports. One or more wake on LAN (WoL) patterns associated with each of the drivers may be detected at one or more Ethernet ports. A wake up signal may be communicated to one or more drivers associated with the detected WoL patterns. One of the drivers may be appointed to be a port master driver. If a failure of the appointed port master driver is detected, another driver may be appointed to be the port master driver.

Claims (33)

1. A method for processing data, the method comprising:

controlling a port speed associated with one or more Ethernet ports; and

synchronizing, by a physical network interface controller (NIC), one or more virtual drivers associated with each of a plurality of virtual NICs based on said controlling said port speed associated with said one or more Ethernet ports.

2. The method according to claim 1 , wherein each of said plurality of virtual NICs share said one or more Ethernet ports.

3. The method according to claim 1 , comprising receiving one or more host system interface (HSI) commands from said one or more virtual drivers.

4. The method according to claim 3 , wherein said one or more HSI commands comprise one or more of: a driver load request, a driver unload request, a driver reset request, a driver heart-beat request, or a driver diagnostic mode request.

5. The method according to claim 3 , comprising receiving a driver completion notification from said one or more virtual drivers when said one or more virtual drivers completes processing of said one or more HSI commands.

6. The method according to claim 5 , comprising communicating a processor completion notification to said one or more virtual drivers based on said driver completion notification.

7. The method according to claim 6 , comprising authorizing one or more other virtual drivers to process said one or more HSI commands after said communicating said processor completion notification to said one or more virtual drivers.

8. The method according to claim 1 , comprising communicating a signal to said one or more virtual drivers associated with detecting one or more wake on LAN (WoL) patterns at said one or more Ethernet ports.

9. The method according to claim 8 , comprising configuring each of said one or more virtual drivers to wake up a particular Peripheral Component Interconnect-Express (PCIe) root complex based on said one or more WoL patterns.

10. The method according to claim 1 , comprising detecting failure of appointing one of said one or more virtual drivers to be a port master driver based on one or more of: an expiry of a master driver timer, an unload notification by said port master driver, or a failure of an acknowledgement by said port master driver.

11. A system for processing data, the system comprising:

one or more processors, one or more circuits, or any combination thereof for use in a physical network interface controller (NIC) and operable to:

control a port speed associated with one or more Ethernet ports; and

synchronize one or more virtual drivers associated with each of a plurality of virtual NICs based on said control of said port speed associated with said one or more Ethernet ports.

12. The system according to claim 11 , wherein each of said plurality of virtual NICs share said one or more Ethernet ports.

13. The system according to claim 11 , wherein said one or more processors, one or more circuits, or any combination thereof is further operable to receive one or more host system interface (HSI) commands from said one or more virtual drivers.

14. The system according to claim 13 , wherein said one or more HSI commands comprise one or more of: a driver load request, a driver unload request, a driver reset request, a driver heart-beat request, or a driver diagnostic mode request.

15. The system according to claim 13 , wherein said one or more processors, one or more circuits, or any combination thereof is further operable to receive a driver completion notification from said one or more virtual drivers when said one or more virtual drivers completes processing of said one or more HSI commands.

16. The system according to claim 15 , wherein said one or more processors, one or more circuits, or any combination thereof is further operable to communicate a processor completion notification to said one or more virtual drivers based on said driver completion notification.

17. The system according to claim 16 , wherein said one or more processors, one or more circuits, or any combination thereof is further operable to authorize one or more other virtual drivers to process said one or more HSI commands after communication of said processor completion notification to said one or more virtual drivers.

18. The system according to claim 11 , wherein said one or more processors, one or more circuits, or any combination thereof is further operable to communicate a signal to said one or more virtual drivers associated with detecting one or more wake on LAN (WoL) patterns at said one or more Ethernet ports.

19. The system according to claim 18 , wherein said one or more processors, one or more circuits, or any combination thereof is further operable to configure each of said one or more virtual drivers to wake up a particular Peripheral Component Interconnect-Express (PCIe) root complex based on said one or more WoL patterns.

20. The system according to claim 11 , wherein said one or more processors, one or more circuits, or any combination thereof is further operable to detect failure of appointing one of said one or more virtual drivers to be a port master driver based on one or more of: an expiry of a master driver timer, an unload notification by said port master driver, or a failure of an acknowledgement by said port master driver.

21. A device comprising:

a network port; and

a network interface controller (NIC) operable to:

communicate with a first virtual NIC driver associated with said network port;

communicate with a second virtual NIC driver associated with said network port;

control at least one parameter associated with said network port; and

synchronize activity of said first virtual NIC driver, with respect to said second virtual NIC driver based on said control of said at least one parameter.

22. The device of claim 21 , wherein said activity of said first virtual NIC driver comprises at least one of a driver load, a driver unload, a driver soft reset, or a driver hard reset.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER IN THE INCORRECT US PATENT NO. 8,876,094 PREVIOUSLY RECORDED ON REEL 047351 FRAME 0384. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 049248/0558 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF THE MERGER PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0910. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047351/0384 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0910 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
Continuity (3)
Continuation 12111485 · Apr 29, 2008
Provisional Application 60914979 · Apr 30, 2007
Related Publication 20110185370A1 · Jul 28, 2011