IP Library Granted Patent US 8,733,620
Granted Patent B2
US 8,733,620 · App. 11/297,722 · Granted May 27, 2014

Solder deposition and thermal processing of thin-die thermal interface material

Inventors: Mukul Renavikar (Chandler, AZ); Susheel G. Jadhav (Chandler, AZ)
Assignee: Intel Corporation
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Quick Facts
Patent No.
US 8,733,620
App. No.
11/297,722
Granted
May 27, 2014
Kind
B2
Abstract

A solder is deposited on a heat sink. The solder is first reflowed at a first temperature that is below about 120° C. The solder is second heat aged at a temperature that causes the first reflowed solder to have an increased second reflow temperature. The heat aging process results in less compressive stress in a die that uses the solder as a thermal interface material. The solder can have a composition that reflows and adheres to the die and the heat sink without the use of organic fluxes.

Claims (13)

1. A process comprising: forming a solder on a heat sink surface, wherein the solder is an In layer on the heat sink and an Au flash layer above and on the In layer; bonding the solder to the heat sink surface at a first processing temperature to achieve a solder first remelting temperature and a remelted solder, and wherein the remelted solder and the heat sink surface are substantially free of organic flux and organic flux residue.

2. The process of claim 1 , wherein the In layer has a thickness in a range from about 5 μm to about 13 μm, wherein the Au flash layer has a thickness in a range from about 0.08 μm to about 0.52 μm, the process further including: heat aging at a second processing temperature range from about 50° C. to about 100° C. above the first processing temperature.

3. The process of claim 2 , wherein at least one of bonding at the first processing temperature and heat aging at the second processing temperature is done in a non-oxidizing gas environment.

4. The process of claim 1 , further including: heat aging at a second processing temperature range from about 50° C. to about 100° C. above the first processing temperature a time range from about 10 minutes to about 2 hours.

5. A process comprising:

forming a solder on a heat sink surface, wherein the solder is an In layer on the heat sink and an Au flash layer above and on the In layer, wherein the In layer has a thickness in a range from about 5 μm to about 13 μm, wherein the Au flash layer has a thickness in a range from about 0.08 μm to about 0.52 μm;

bonding the solder to the heat sink surface at a first processing temperature to achieve a solder first remelting temperature and a remelted solder, and wherein the remelted solder and the heat sink surface are substantially free of organic flux and organic flux residue; and

heat aging at a second processing temperature range from about 50° C. to about 100° C. above the first processing temperature, wherein at least one of bonding at the first processing temperature and heat aging at the second processing temperature is done in a non-oxidizing gas environment and an overpressure in a range from about 7.25 kPa (50 psi) to about 14.5 kPa (100 psi).

6. The process of claim 5 , further including:

thinning a die to a thickness range from 100 μm to 210 μm;

wherein bonding results in a voids fraction in the solder in a range from 0.1% voids to 1% voids; and

bonding the die to the to the solder.

7. The process of claim 5 , wherein heat aging at the second processing temperature range is done above the first processing temperature a time range from about 10 minutes to about 2 hours.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2005
From: RENAVIKAR, MUKUL; JADHAV, SUSHEEL G.
To: INTEL CORPORATION
Reel/Frame 017306/0866 →
Continuity (1)
Related Publication 20070131737A1 · Jun 14, 2007