IP Library Granted Patent US 8,752,007
Granted Patent B2
US 8,752,007 · App. 12/056,063 · Granted Jun 10, 2014

Automatic generation of run-time instrumenter

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Quick Facts
Patent No.
US 8,752,007
App. No.
12/056,063
Granted
Jun 10, 2014
Kind
B2
Abstract

A method and apparatus for automatically generating a run-time instrumenter are disclosed. In accordance with the illustrative embodiment, an off-line analyzer first determines instrumentation locations for a program under test in accordance with a method called the Super Nested Block Method. After the instrumentation locations have been determined, source code for a run-time instrumenter is automatically generated based on the source code for the program under test and the instrumentation locations. The source code for the program under test and the run-time instrumenter are then compiled into executables, and a testing tool then executes the program under test and the run-time instrumenter in parallel.

Claims (41)

1. A system comprising:

a processor; and

a computer-readable storage device storing instructions which, when executed by the processor, cause the processor to perform operations comprising:

identifying a block in program source code, wherein:

(i) for any two consecutive lines of code within the block, when a first line of the two consecutive lines executes at a first time, the second line of the two consecutive lines executes at a second time later than the first time; and

(ii) for a pair of consecutive lines of code, line X and line Y, within the block, another line of code is executed between the line X and the line Y;

determining, based on (a) an analysis of the block and a control-flow graph of the block which indicates execution of a first node in the block implies execution of a first line of a second node in the block, and (b) a branch statement located within the block, an instrumentation location in the program source code;

generating run-time instrumenter source code based on the program source code and the instrumentation location;

compiling the program source code to yield a program;

compiling the run-time instrumenter source code to yield a run-time instrumenter executable; and

executing the program and the run-time instrumenter executable on a single device in parallel.

2. The system of claim 1 , wherein the program is for a real-time system.

3. The system of claim 1 , wherein the computer-readable storage device stores additional instructions which, when executed by the processor, cause the processor to perform the operations further comprising receiving an input that specifies a location in the program source code to yield another instrumentation location.

4. The system of claim 3 , wherein the computer-readable storage device stores additional instructions which, when executed by the processor, cause the processor to perform the operations further comprising inserting a probe at a specific location in the program during an execution of the program.

5. The system of claim 4 , wherein the computer-readable storage device stores additional instructions which, when executed by the processor, cause the processor to perform the operations further comprising removing the probe after the probe has been executed once.

6. A method comprising:

identifying a block in program source code, wherein:

(i) for any two consecutive lines of code within the block, when a first line of the two consecutive lines executes at a first time, the second line of the two consecutive lines executes at a second time later than the first time; and

(ii) for a pair of consecutive lines of code, line X and line Y, within the block, another line of code is executed between the line X and the line Y;

determining, based on (a) an analysis of the block and a control-flow graph of the block which indicates execution of a first node in the block implies execution of a first line of a second node in the block, and (b) a branch statement located within the block, an instrumentation location in the program source code;

generating, via a processor, run-time instrumenter source code based on the program source code and the instrumentation location;

compiling the program source code to yield a program;

compiling the run-time instrumenter source code to yield a run-time instrumenter executable; and

executing the program and the run-time instrumenter executable on a single device in parallel.

7. The method of claim 6 , wherein the program is for a real-time system.

8. The method of claim 6 , further comprising receiving an input that specifies a location in the program source code to yield another instrumentation location.

9. The method of claim 8 , further comprising inserting a probe at a specific location in the program during the execution of the program.

10. The method of claim 9 , further comprising removing the probe after the probe has been executed once.

11. A non-transitory computer-readable storage device storing instructions which, when executed by a processor, cause the processor to perform operations comprising:

identifying a block in program source code, wherein:

(i) for any two consecutive lines of code within the block, when a first line of the two consecutive lines executes at a first time, the second line of the two consecutive lines executes at a second time later than the first time; and

(ii) the block is not a basic block;

determining, based on (a) an analysis of the block and a control-flow graph of the block which indicates execution of a first node in the block implies execution of a first line of a second node in the block, and (b) a branch statement located within the block, an instrumentation location in the program source code;

generating run-time instrumenter source code based on the program source code and the instrumentation location;

compiling the program source code to yield a program;

compiling the run-time instrumenter source code to yield a run-time instrumenter executable; and

executing the program and the run-time instrumenter executable on a single device in parallel.

12. The system of claim 1 , wherein the run-time instrumenter executable generates a report of code coverage of the program after the program is executed.

13. The method of claim 6 , wherein the run-time instrumenter executable generates a report of code coverage of the program after the program is executed.

14. The non-transitory computer-readable storage device of claim 11 , wherein the run-time instrumenter executable generates a report of code coverage of the program after the program is executed.

15. The method of claim 6 , wherein generating the run-time instrumenter source code is done without user input.

Assignments (14)
RELEASE OF SECURITY INTEREST IN PATENTS (REEL/FRAME 045034/0001) Recorded May 18, 2023
From: GOLDMAN SACHS BANK USA., AS COLLATERAL AGENT
To: AVAYA INC.; INTELLISIST, INC.; AVAYA INTEGRATED CABINET SOLUTIONS LLC; OCTEL COMMUNICATIONS LLC; VPNET TECHNOLOGIES, INC.; ZANG, INC. (FORMER NAME OF AVAYA CLOUD INC.); HYPERQUALITY, INC.; HYPERQUALITY II, LLC; CAAS TECHNOLOGIES, LLC; AVAYA MANAGEMENT L.P.
Reel/Frame 063779/0622 →
RELEASE OF SECURITY INTEREST IN PATENTS AT REEL 45124/FRAME 0026 Recorded Apr 26, 2023
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: AVAYA HOLDINGS CORP.; AVAYA INC.; AVAYA MANAGEMENT L.P.; AVAYA INTEGRATED CABINET SOLUTIONS LLC
Reel/Frame 063457/0001 →
SECURITY INTEREST Recorded Jan 23, 2018
From: AVAYA INC.; AVAYA INTEGRATED CABINET SOLUTIONS LLC; OCTEL COMMUNICATIONS LLC; VPNET TECHNOLOGIES, INC.; ZANG, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 045124/0026 →
SECURITY INTEREST Recorded Jan 10, 2018
From: AVAYA INC.; AVAYA INTEGRATED CABINET SOLUTIONS LLC; OCTEL COMMUNICATIONS LLC; VPNET TECHNOLOGIES, INC.; ZANG, INC.
To: GOLDMAN SACHS BANK USA, AS COLLATERAL AGENT
Reel/Frame 045034/0001 →
BANKRUPTCY COURT ORDER RELEASING ALL LIENS INCLUDING THE SECURITY INTEREST RECORDED AT REEL/FRAME 041576/0001 Recorded Dec 15, 2017
From: CITIBANK, N.A.
To: AVAYA INC.; AVAYA INTEGRATED CABINET SOLUTIONS INC.; OCTEL COMMUNICATIONS LLC (FORMERLY KNOWN AS OCTEL COMMUNICATIONS CORPORATION); VPNET TECHNOLOGIES, INC.
Reel/Frame 044893/0531 →
BANKRUPTCY COURT ORDER RELEASING ALL LIENS INCLUDING THE SECURITY INTEREST RECORDED AT REEL/FRAME 029608/0256 Recorded Dec 15, 2017
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
To: AVAYA INC.
Reel/Frame 044891/0801 →
BANKRUPTCY COURT ORDER RELEASING ALL LIENS INCLUDING THE SECURITY INTEREST RECORDED AT REEL/FRAME 025863/0535 Recorded Dec 15, 2017
From: THE BANK OF NEW YORK MELLON TRUST, NA
To: AVAYA INC.
Reel/Frame 044892/0001 →
BANKRUPTCY COURT ORDER RELEASING ALL LIENS INCLUDING THE SECURITY INTEREST RECORDED AT REEL/FRAME 030083/0639 Recorded Dec 15, 2017
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
To: AVAYA INC.
Reel/Frame 045012/0666 →
SECURITY INTEREST Recorded Jan 27, 2017
From: AVAYA INC.; AVAYA INTEGRATED CABINET SOLUTIONS INC.; OCTEL COMMUNICATIONS CORPORATION; VPNET TECHNOLOGIES, INC.
To: CITIBANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041576/0001 →
SECURITY AGREEMENT Recorded Mar 13, 2013
From: AVAYA, INC.
To: BANK OF NEW YORK MELLON TRUST COMPANY, N.A., THE
Reel/Frame 030083/0639 →
SECURITY AGREEMENT Recorded Jan 10, 2013
From: AVAYA, INC.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 029608/0256 →
SECURITY AGREEMENT Recorded Feb 22, 2011
From: AVAYA INC., A DELAWARE CORPORATION
To: BANK OF NEW YORK MELLON TRUST, NA, AS NOTES COLLATERAL AGENT, THE
Reel/Frame 025863/0535 →
REASSIGNMENT Recorded Jun 26, 2008
From: AVAYA TECHNOLOGY LLC
To: AVAYA INC
Reel/Frame 021156/0734 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2008
From: LI, JUAN JENNY; WEISS, DAVID MANDEL
To: AVAYA TECHNOLOGY LLC
Reel/Frame 020770/0913 →