IP Library Granted Patent US 8,753,913
Granted Patent B2
US 8,753,913 · App. 13/422,049 · Granted Jun 17, 2014

Method for fabricating novel semiconductor and optoelectronic devices

Inventors: Zvi Or-Bach (San Jose, CA); Deepak C. Sekar (San Jose, CA)
Assignee: Monolithic 3D Inc.
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Quick Facts
Patent No.
US 8,753,913
App. No.
13/422,049
Granted
Jun 17, 2014
Kind
B2
Abstract

A method for fabricating an integrated device, the method including, overlying a first crystalline layer onto a second crystalline layer to form a combined layer, wherein one of the first and second crystalline layers is an image sensor layer and at least one of the first and second crystalline layers has been transferred by performing an atomic species implantation, and wherein at least one of the first and second crystalline layers includes single crystal transistors.

Claims (73)

1. A method for fabricating an integrated device, comprising:

overlying a first crystalline layer onto a second crystalline layer to form a combined layer, wherein one of the said first and second crystalline layers is an image sensor layer; and

performing an atomic species implantation to transfer at least one of the said first and second crystalline layers; wherein at least one of the said first and second crystalline layers comprises single crystal transistors.

2. A method for fabricating an integrated device according to claim 1 , wherein

said image sensor layer and said single crystal transistors are aligned to each other, and wherein said aligned has less than 1 micron alignment error.

3. A method for fabricating an integrated device according to claim 1 , wherein

said image sensor layer comprises two crystalline layers, wherein;

said two crystalline layers comprise a first image sensor layer and a second image sensor layer, and wherein;

said first image sensor layer is sensitive to a different spectrum than said second image sensor layer.

4. A method for fabricating an integrated device according to claim 1 , wherein

said image sensor layer comprises two crystalline layers, wherein;

said two crystalline layers comprise a first image sensor layer and a second image sensor layer, and wherein;

said first image sensor layer has at least an order of magnitude difference in light sensitivity than said second image sensor layer.

5. A method for fabricating an integrated device according to claim 1 , wherein

said image sensor layer comprises two crystalline layers, wherein;

said two crystalline layers comprise a first image sensor layer and a second image sensor layer, and wherein;

the construction process of at least one of said two crystalline layers comprises atomic species implantation.

6. A method for fabricating an integrated device according to claim 1 , wherein

said second crystalline layer is an image sensor layer, and wherein

said image sensor layer is processed after said transferred.

7. A method for fabricating an integrated device according to claim 1 , wherein

said single crystal transistors form a plurality of pixel control circuits.

8. A method for fabricating an integrated device, comprising:

processing a first mono-crystal layer to comprise a plurality of image sensor pixels and alignment marks, and then

overlaying oxide on top of said first mono-crystal layer, and then

transferring a second mono-crystal layer on said oxide, and then

processing said second mono-crystal layer to comprise a plurality of single crystal transistors aligned to said alignment marks, wherein said aligned has less than 1 micron alignment error.

9. A method for fabricating an integrated device according to claim 8 , wherein

said transferring comprises atomic species implantation.

10. A method for fabricating an integrated device according to claim 8 , wherein

said image sensor pixels and said single crystal transistors are aligned to each other.

11. A method for fabricating an integrated device according to claim 8 , wherein

said first mono-crystal layer comprises two crystalline layers, wherein;

said two crystalline layers comprise a first image sensor layer and a second image sensor layer, and wherein;

said first image sensor layer is sensitive to a different spectrum than said second image sensor layer.

12. A method for fabricating an integrated device according to claim 8 , wherein

said first mono-crystal layer comprises two crystalline layers, wherein;

said two crystalline layers comprise a first image sensor layer and a second image sensor layer, and wherein;

said first image sensor layer has at least an order of magnitude difference in light sensitivity than said second image sensor layer.

13. A method for fabricating an integrated device according to claim 8 , wherein

said first mono-crystal layer comprises two crystalline layers, wherein;

said two crystalline layers comprise a first image sensor layer and a second image sensor layer, and wherein;

the construction process of at least one of said two crystalline layers comprises atomic species implantation.

14. A method for fabricating an integrated device according to claim 8 , wherein

said first mono-crystal layer comprises a polarizer.

15. A method for fabricating an integrated device according to claim 8 , wherein

said single crystal transistors form a plurality of pixel control circuits.

16. A method for fabricating an integrated device, comprising:

processing a first mono-crystal layer to comprise a plurality of single crystal transistors and alignment marks, and then

overlaying oxide on top of said first mono-crystal layer, and then

transferring a second mono-crystal layer on said oxide, and then

processing said second mono-crystal layer to comprise a plurality of image sensor pixels aligned to said alignment marks, and

wherein said aligned has less than 1 micron alignment error.

17. A method for fabricating an integrated device according to claim 16 , wherein

said transferring comprises atomic species implantation.

18. A method for fabricating an integrated device according to claim 16 , wherein

said image sensor pixels and said single crystal transistors are aligned to each other.

19. A method for fabricating an integrated device according to claim 16 , wherein

said second mono-crystal layer comprises two crystalline layers, wherein;

said two crystalline layers comprise a first image sensor layer and a second image sensor layer, and wherein;

said first image sensor layer is sensitive to a different spectrum than said second image sensor layer.

20. A method for fabricating an integrated device according to claim 16 , wherein

said second mono-crystal layer comprises two crystalline layers, wherein;

said two crystalline layers comprise a first image sensor layer and a second image sensor layer, and wherein;

said first image sensor layer has at least an order of magnitude difference in light sensitivity than said second image sensor layer.

21. A method for fabricating an integrated device according to claim 16 , wherein

said second mono-crystal layer comprises two crystalline layers, wherein;

said two crystalline layers comprise a first image sensor layer and a second image sensor layer, and wherein;

the construction process of at least one of said two crystalline layers comprises atomic species implantation.

22. A method for fabricating an integrated device according to claim 16 , wherein

said second mono-crystal layer comprises a polarizer.

23. A method for fabricating an integrated device according to claim 16 , wherein

said single crystal transistors form a plurality of pixel control circuits.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 7, 2013
From: OR-BACH, ZVI; SEKAR, DEEPAK
To: MONOLITHIC 3D INC.
Reel/Frame 029774/0139 →
Continuity (2)
Continuation 12904103 · Oct 13, 2010
Related Publication 20120231572A1 · Sep 13, 2012