IP Library Granted Patent US 8,769,160
Granted Patent B2
US 8,769,160 · App. 13/332,545 · Granted Jul 1, 2014

Multi-interface memory card and method of operation

Inventors: Sung Geun Park (Sunwon-si, KR); Chul Joon Choi (Sunwon-si, KR); Tae-Geuk Kim (Gunpo-si, KR)
Assignee: Samsung Electronics Co., Ltd.
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Quick Facts
Patent No.
US 8,769,160
App. No.
13/332,545
Granted
Jul 1, 2014
Kind
B2
Abstract

A method of operating a multi-interface memory card including a first interface supporting a universal serial bus (USB) data transfer protocol and the second interface supporting an inter-chip USB (IC-USB) data transfer protocol includes; selecting either the first interface or the second interface to facilitate data communication between the multi-interface memory card and a host connected to the multi-interface memory card via a USB connection by comparing a level of a power-on voltage received from the host with a reference voltage level, and thereafter determining whether a reset signal has been received from the host.

Claims (47)

1. An operating method for a multi-interface memory card, the method comprising:

detecting a level of a power-on voltage received from a host and generating corresponding voltage level information;

analyzing the voltage level information in response to a reset signal received from the host and providing an analysis result; and

enabling one of a plurality of interfaces controlling communication between the multi-interface memory card and the host in accordance with the analysis result.

2. The method of claim 1 , wherein the power-on voltage is received at a V BUS terminal of the multi-interface memory card via a universal serial bus (USB) connection,

the reset signal is received via a connection terminal of the host; and

analyzing the voltage level information comprises comparing the voltage level information with reference voltage level information.

3. The method of claim 2 , wherein the connection terminal is a D+ terminal.

4. The method of claim 1 , wherein the plurality of interfaces comprises a first interface supporting a USB data transfer protocol and a second interface supporting an inter-chip USB (IC-USB) data transfer protocol.

5. The method of claim 1 , wherein the multi-interface memory card is an integrated circuit (IC) card having a body shaped like a credit card.

6. The method of claim 1 , wherein the multi-interface memory card is one of a subscriber identity module (SIM) card, a universal subscriber identity module (USIM) card.

7. The method of claim 1 , wherein the multi-interface memory card comprises a non-volatile memory and the method further comprises:

communicating data between the host and the memory via the enabled one of the plurality of interfaces.

8. The method of claim 4 , further comprising:

counting a predetermined period of time in response to an applied clock signal;

determining whether the reset signal is received from the host during the predetermined period of time; and

when the reset signal is not received during the predetermined period of time, disabling both of the first interface and the second interface, else when the reset signal is received during the predetermined period of time, analyzing the voltage level information in response to the reset signal and enabling one interface among the first interface and the second interface according to an analysis result.

9. The method of claim 8 , wherein generating the corresponding voltage level information comprises:

detecting the level of the power-on voltage received via a V BUS terminal and generating the voltage level information according to a detection result; and

enabling the one of the plurality of interfaces comprises:

comparing the voltage level information with reference voltage level information in response to the reset signal received via a D+ terminal of the host; and

enabling one of the first interface and the second interface according to a comparison result.

10. The method of claim 8 , wherein the counting the predetermined period of time comprises counting the predetermined period of time using a timer operating in response to the applied clock signal.

11. A multi-interface memory card comprising:

a first interface configured to support a first data transfer protocol;

a second interface configured to support a second data transfer protocol;

a voltage level detector configured to detect a level of a power-on voltage received from a host via a universal serial bus (USB) connection, and generate corresponding voltage level information;

a reset signal detector configured to detect a reset signal received from the host via the USB connection and generate a detection signal; and

a central processing unit (CPU) configured to compare the voltage level information with reference voltage level information in response to the detection signal and enable one of the first interface and the second interface according to a result of the comparison between the voltage level information and the reference voltage level.

12. The multi-interface memory card of claim 11 , wherein the power-on voltage is received from a V BUS terminal of the host via the USB connection, and the reset signal detector receives the reset signal via a D+ terminal of the host.

13. The multi-interface memory card of claim 11 , wherein the first interface supports a USB data transfer protocol and the second interface supports an inter-chip USB (IC-USB) data transfer protocol.

14. The multi-interface memory card of claim 11 , wherein the multi-interface memory card is one of a subscriber identity module (SIM) card and a universal subscriber identity module (USIM) card.

15. The multi-interface memory card of claim 11 , further comprising:

a counter configured to count a predetermined period of time in response to an applied clock signal, wherein the reset signal detector determines whether the reset signal is received during the predetermined period of time and generates the detection signal, and

the CPU disables the first interface and the second interface in response to the detection signal indicating that the reset signal is not received during the predetermined period of time.

16. The multi-interface memory card of claim 15 , further comprising:

a power on reset circuit configured to compare the level of the power-on voltage with a reference voltage level and generate a power on reset signal,

wherein the CPU and the counter are initialized in response to the power on reset signal.

17. A method of operating a multi-interface memory card including a first interface supporting a universal serial bus (USB) data transfer protocol and a second interface supporting an inter-chip USB (IC-USB) data transfer protocol, the method comprising:

selecting one of the first interface and the second interface to facilitate data communication between the multi-interface memory card and a host connected to the multi-interface memory card via a USB connection by:

receiving a power-on voltage in the multi-interface memory card from the host,

comparing in the multi-interface memory card a level of the power-on voltage with a reference voltage level, and

thereafter determining in the multi-interface memory card whether a reset signal has been received from the host, and

only upon receiving the reset signal during a predetermined period of time, selecting the one of the first interface and the second interface.

18. The method of claim 17 , further comprising:

communicating data between the multi-interface memory card and the host via the USB connection using the one of the first interface and the second interface.

19. The method of claim 17 , wherein the power-on voltage is received via the USB connection at a V BUS terminal of the multi-interface memory card.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2011
From: PARK, SUNG GEUN; CHOI, CHUL JOON; KIM, TAE GEUK
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 027437/0094 →
Priority Claims (1)
KR 10-2010-0131904 · Dec 21, 2010 · national
Continuity (1)
Related Publication 20120159008A1 · Jun 21, 2012