IP Library › Granted Patent US 8,781,539
Granted Patent B1
US 8,781,539 · App. 13/745,727 · Granted Jul 15, 2014

Method and apparatus for reducing wake up time of a powered down device

Inventors: Xiaodong Jin (Sunnyvale, CA); King Chun Tsai (San Jose, CA); Yonghua Song (Saratoga, CA)
Assignee: Marvell International Ltd.
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Quick Facts
Patent No.
US 8,781,539
App. No.
13/745,727
Granted
Jul 15, 2014
Kind
B1
Abstract

A method includes, in at least one aspect, connecting an input of a bias circuit and an output of the bias circuit to another circuit while the other circuit is in a first power mode, such that the bias circuit has an operating state corresponding to the first power mode; switching the input of the bias circuit and the output of the bias circuit from the other circuit to a dummy circuit when a power mode of the other circuit is changed from the first power mode to a second power mode; and maintaining the bias circuit at the operating state corresponding to the first power mode using the dummy circuit while the other circuit is in the second power mode.

Claims (38)

1. A method comprising:

connecting an input of a bias circuit and an output of the bias circuit to another circuit while the other circuit is in a first power mode, such that the bias circuit has an operating state corresponding to the first power mode;

switching the input of the bias circuit and the output of the bias circuit from the other circuit to a dummy circuit when a power mode of the other circuit is changed from the first power mode to a second power mode; and

maintaining the bias circuit at the operating state corresponding to the first power mode using the dummy circuit while the other circuit is in the second power mode.

2. The method of claim 1 , wherein the bias circuit includes a comparative amplifier, the input of the bias circuit is coupled to an input of the comparative amplifier, and maintaining the bias circuit at the operating state corresponding to the first power mode comprises maintaining the input of the comparative amplifier at a voltage level corresponding to the first power mode while the other circuit is in the second power mode.

3. The method of claim 1 , wherein the bias circuit includes a capacitor coupled between the input of the bias circuit and the output of the bias circuit, and maintaining the bias circuit at the operating state corresponding to the first power mode comprises maintaining a voltage across the capacitor at a voltage level corresponding to the first power mode.

4. The method of claim 1 , wherein the dummy circuit consumes less power than the other circuit when the other circuit is in the first power mode and operates only while the other circuit is in the second power mode.

5. The method of claim 1 , wherein connecting the output of the bias circuit to the other circuit comprises providing one of a bias current or a bias voltage from the bias circuit to the other circuit.

6. The method of claim 1 , comprising:

switching the input of the bias circuit and the output of the bias circuit from the dummy circuit to the other circuit when the power mode of the other circuit is changed from the second power mode to the first power mode; and

deactivating the dummy circuit while the other circuit is in the first power mode.

7. An apparatus comprising:

switch circuitry that connects an input of a bias circuit and an output of the bias circuit to either another circuit or a dummy circuit; and

control circuitry that operates the switch circuitry to:

connect the input of the bias circuit and the output of the bias circuit to the other circuit while the other circuit is in a first power mode, such that the bias circuit has an operating state corresponding to the first power mode, and

connect the input of the bias circuit and the output of the bias circuit from the other circuit to the dummy circuit when a power mode of the other circuit is changed from the first power mode to a second power mode, such that the bias circuit is maintained at the operating state corresponding to the first power mode while the other circuit is in the second power mode.

8. The apparatus of claim 7 , wherein the bias circuit includes a comparative amplifier, the input of the bias circuit is coupled to an input of the comparative amplifier, and the control circuitry is configured to operate the switch circuitry to maintain the input of the comparative amplifier at a voltage level corresponding to the first power mode while the other circuit is in the second power mode.

9. The apparatus of claim 7 , wherein the bias circuit includes a capacitor coupled between the input of the bias circuit and the output of the bias circuit, and the control circuitry is configured to operate the switch circuitry to maintain a voltage across the capacitor at a voltage level corresponding to the first power mode.

10. The apparatus of claim 7 , wherein the dummy circuit consumes less power than the other circuit when the other circuit is in the first power mode and operates only while the other circuit is in the second power mode.

11. The apparatus of claim 7 , wherein the control circuitry is configured to operate the switch circuitry to provide one of a bias current or a bias voltage from the bias circuit to the other circuit.

12. The apparatus of claim 7 , wherein the control circuitry is configured to operate the switch circuitry to:

switch the input of the bias circuit and the output of the bias circuit from the dummy circuit to the other circuit when the power mode of the other circuit is changed from the second power mode to the first power mode; and

deactivate the dummy circuit while the other circuit is in the first power mode.

13. A system comprising:

a bias circuit having an input and an output;

a dummy circuit;

another circuit; and

a switching circuit configured to:

connect the input of the bias circuit and the output of the bias circuit to the other circuit while the other circuit is in a first power mode, such that the bias circuit has an operating state corresponding to the first power mode;

switch the input of the bias circuit and the output of the bias circuit from the other circuit to the dummy circuit when a power mode of the other circuit is changed from the first power mode to a second power mode; and

maintain the bias circuit at the operating state corresponding to the first power mode using the dummy circuit while the other circuit is in the second power mode.

14. The system of claim 13 , wherein the bias circuit includes a comparative amplifier, the input of the bias circuit is coupled to an input of the comparative amplifier, and the switching circuit configured to maintain the bias circuit at the operating state corresponding to the first power mode comprises the switching circuit configured to maintain the input of the comparative amplifier at a voltage level corresponding to the first power mode while the other circuit is in the second power mode.

15. The system of claim 13 , wherein the bias circuit includes a capacitor coupled between the input of the bias circuit and the output of the bias circuit, and the switching circuit configured to maintain the bias circuit at the operating state corresponding to the first power mode comprises the switching circuit configured to maintain a voltage across the capacitor at a voltage level corresponding to the first power mode.

16. The system of claim 13 , wherein the dummy circuit consumes less power than the other circuit when the other circuit is in the first power mode and operates only while the other circuit is in the second power mode.

17. The system of claim 13 , wherein the switching circuit configured to connect the output of the bias circuit to the other circuit comprises the switching circuit configured to provide one of a bias current or a bias voltage from the bias circuit to the other circuit.

18. The system of claim 13 , wherein the switching circuit is configured to:

switch the input of the bias circuit and the output of the bias circuit from the dummy circuit to the other circuit when the power mode of the other circuit is changed from the second power mode to the first power mode; and

deactivate the dummy circuit while the other circuit is in the first power mode.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2020
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE, LTD.
Reel/Frame 053475/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2020
From: MARVELL INTERNATIONAL LTD.
To: CAVIUM INTERNATIONAL
Reel/Frame 052918/0001 →
Continuity (3)
Continuation 11546605 · Oct 11, 2006
Continuation 10753101 · Jan 6, 2004
Provisional Application 60470687 · May 14, 2003